Wide common mode high-speed differential receiver using thin and thick gate oxide MOSFETS in deep-submicron technology
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Hui Chen
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Hui Chen
Estimating the term…
A high speed receiver circuit is disclosed with a high supply voltage and operable with other circuits operating at a low supply voltage. The receiver circuit comprises first and second differential input signals controlling first and second current switches. It also includes a top current supply connected to the high supply voltage for providing a current to be passed either through the first current switch and a first bottom current supply or the second current switch and a second bottom current supply. Further included are first and second resistors connected to the low supply voltage and in a series with the first or second bottom current supplies respectively. First and second differential output signals are produced at a point between each pair of the resistors and the bottom current supply. A common mode voltage of the first and second differential output signals is lower than the low supply voltage.
A receiver circuit with a high supply voltage and operable with additional circuits operating at a low supply voltage, the receiver circuit comprising:
Dependencies are inferred from the claim text.
From the US filing history. Foreign family members aren’t listed.
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Arrangements for coupling to transmission lines: arrangements specific to the receiver end
Of complementary type, e.g. CMOS: with at least one differential stage
Arrangements for coupling to transmission lines: arrangements for coupling to multiple lines, e.g. for differential transmission
Digital communication
Term ended 20 Apr 2024 (estimated)
The present invention relates generally to semiconductor devices, and more particularly, to high-speed receiver semiconductor devices. Still more particularly, the present invention relates to the circuit and method of using thin and thick film gate oxide MOSFETs to construct wide common mode, high-speed differential receivers, in deep sub-micron technology semiconductor devices.
Differential signaling has been utilized for many years as a data transmission method. A differential receiver converts and amplifies a differential input signal (IN+ and IN−) to a differential output signal (VOUT+ and VOUT−). These receivers offer high data transmission speeds, low noise coupling, and low EMI (electromagnetic interference). For embodiment, teletype equipment was some of the first types of equipment to use differential signaling to communicate. Today, computers often communicate between ports by low voltage differential signal (LVDS) drivers and receiver pairs. In addition to the LVDS data transmission technology, emitter coupled logic (ECL), common mode logic (CML), and hyper-transport (high-bandwidth chip-to-chip technology) technology are utilized for data transmission methods. Typical differential signal transmission speeds are over 100 Mbps (mega bits per second). In each of these transmission methods, high speed, wide common mode, voltage differential receivers are necessary building blocks to attain the required data transmission speeds while meeting the low noise coupling, and the low EMI requirements.
Semiconductor technology is evolving into the deep sub-micron geometries of less than 100 nanometers (nm). This technology is needed to produce today's portable devices such as cellular telephones, laptops, and other portable electronic devices. The smaller geometry gates of less than 100 nm offer more complex functionality and higher performance, but not without a cost. As the nanometer gate geometry becomes smaller, its power dissipation increases dramatically, hence the battery power drain increases significantly.
FIG. 1 presents a wide common mode, high-speed differential receiver in accordance with one embodiment of the present invention.
FIG. 2 presents a diagram illustrating the current flow through the wide common mode, high-speed differential receiver in accordance with one embodiment of the present invention.
FIG. 3 presents a graph illustrating the relationship between the common mode input voltage, and the common mode output voltage, of the high-speed differential receiver, in accordance with one embodiment of the present invention.
In the present invention, a circuit and method comprised of a pre-amplifier stage utilizing both thick and thin film MOSFETs is presented to minimize the high-speed differential receiver circuit's power dissipation while meeting the high-speed data transmission requirements, and also provide supply voltage translation from a high supply voltage VDDH, to a low supply voltage VDDL, for subsequent amplifier stages and digital logic.
FIG. 1 presents a wide common mode high-speed differential receiver 100 using both thin and thick gate oxide MOSFETs in accordance with one embodiment of the present invention. Two PMOS transistors 102 and 104 are thick gate oxide transistors that form a source coupled differential transistor pair or input current switches that receive the differential input signals RX+ and RX−. A PMOS transistor 106 is also a thick gate oxide transistor, which is connected to the VDDH supply voltage and is a constant current source for both transistors 102 and 104. Transistor 106 may be referred to as a top current supply. Transistors 102, 104, and 106 are selected to be thick gate oxide transistors because they can operate at higher supply voltages (VDDH) while minimizing the leakage current, thereby reducing power dissipation. An NMOS transistor 108 is a thin gate oxide transistor that may be seen as a constant current source for the current path through transistors 106, 102, and 108, while an NMOS transistor 110 is also a thin gate oxide transistor that may be seen as another constant current source for the current path transistors 106, 104, and 110. The NMOS transistors 108 and 110 are referred to as bottom current supplies in view of the existence of the top current supply. Both current paths, as defined above and which will be further described in FIG. 2, are connected to VSS, or ground.
If the differential input signals RX+ and RX− are equal, then the current paths of 106, 102, 108 and 106, 104, 110 are equal, and the output signals OUT+ and OUT− are equal. If, however, the differential input signals RX+ and RX− are not equal, then the receiver 100 will amplify the difference and apply it to the output signals OUT+ and OUT−. It is noted that the output signals OUT+ and OUT− are pulled to the supply voltage VDDL by resistors 112 and 114, respectively. Due to the function of these resistors, they are referred to as current-to-voltage converters. It is further understood any other circuit module that provides such a function can replace these resistors. Moreover, the change of output signal level provides the translation of the receiver supply voltage from the input stage VDDH to the output stage VDDL. Therefore, all subsequent amplifier stages can utilize thin gate oxide transistors that operate from the supply voltage VDDL. The thin gate oxide transistors provide higher speed and gain than the thick gate oxide transistors, but cannot operate from the higher supply voltage VDDH. Since the subsequent amplifier stages can utilize the VDDL supply voltage, the overall circuit power dissipation can be reduced significantly, and no additional supply voltage translation is necessary to interface with the subsequent digital logic.