Passage structures for use in low-voltage applications
AssigneeAltera Corporation
InventorsAndy L Lee, Wanli Chang, Cameron McClintock, John E Turner, Brian D Johnson, Chiao Kai Hwang, Richard Y Chang, Richard G Cliff
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Abstract
Enhanced passgate structures for use in low-voltage systems are presented in which the influence of Vt on the range of signals passed by single-transistor passgates is reduced. In one arrangement, the VGATE−Vt limit for signals propagated through NMOS passgates is raised by applying a higher VGATE; in another arrangement, the Vt is lowered. The use of CMOS passgates in applications where single-transistor passgates have traditionally been used is also presented.
Claims15
A method of fabricating a programmable logic device, the method comprising:
- fabricating a first plurality of transistors each having a first threshold voltage;
- and
- fabricating a second plurality of transistors in associated wells configured to be biased separately from the substrate, wherein the threshold voltage of each transistor of the second plurality is reduced by applying a bias voltage to the associated well such that the reduced threshold voltage is lower than the first threshold voltage, and wherein each transistor in the second plurality is grouped to form connections between interconnect lines on the programmable logic device.
A programmable logic device fabricated on a substrate, comprising:
- a first plurality of transistors having a first threshold voltage;
- a second plurality of transistors, each transistor having a drain terminal, a source terminal, a gate terminal, a well connection, and an initial threshold voltage of a given magnitude, the transistor having been fabricated in an associated well that is configured to be biased separately from the substrate, wherein the drain terminal, the source terminal, and the gate terminal are configured to allow the transistor to pass signals between the source terminal and the drain terminal when a control voltage is applied on the gate terminal, and wherein the initial threshold voltage of the transistor is reduced by applying a bias voltage to the associated well, and such that the reduced threshold voltage is lower than said first threshold voltage of the first plurality of transistors.
For a programmable logic device having been fabricated on a substrate and including a first plurality of transistors having a first threshold voltage, and a second plurality of transistors, each having a drain terminal, a source terminal, a gate terminal, a well connection, and an initial threshold voltage of a given magnitude, each transistor having been fabricated in an associated well that is configured to be biased separately from the substrate, a method of operating each of the second plurality of transistors comprising:
- configuring the drain terminal, the source terminal, and the gate terminal to allow the transistor to pass signals between the source terminal and the drain terminal when a control voltage is applied on the gate terminal;
- and
- decreasing the magnitude of the initial threshold voltage of the transistor by applying a bias voltage to the associated well such that said decreased threshold voltage is lower than the said first threshold voltage of the first plurality of transistors.
Dependencies are inferred from the claim text.