Loading patent…
AssigneesHitachi, Ltd., Elpida Memory, Inc.
InventorsHisashi Tanie, Nae Hisano, Hiroyuki Ohta, Hiroaki Ikeda, Ichiro Anjo, Mitsuaki Katagiri, Yuji Watanabe
Estimating the term…
A semiconductor device capable of reducing a temperature increase during operation thereof is provided. In the semiconductor device, an interface chip is stacked on a plurality of stacked semiconductor elements. Both an “Si” interposer and a resin interposer are arranged under the plural semiconductor elements. The Si interposer is arranged between the resin interposer and the plural semiconductor elements. The Si interposer owns a thickness which is thicker than a thickness of a semiconductor element, and also has a linear expansion coefficient which is smaller than a linear expansion coefficient of the resin interposer, and further, is larger than, or equal to linear expansion coefficients of the plural semiconductor elements.
A semiconductor device having a plurality of semiconductor devices which have been stacked to each other, comprising:
A semiconductor device having a plurality of semiconductor devices which have been stacked to each other, in which at least one semiconductor element among said plural semiconductor devices is electrically conducted to another semiconductor element by employing a penetrating electrode, comprising:
A semiconductor device having a plurality of semiconductor devices which have been stacked to each other, in which at least one semiconductor element among said plural semiconductor devices is electrically conducted to another semiconductor element by employing a penetrating electrode, comprising:
Dependencies are inferred from the claim text.