Stacked multi-chip semiconductor package improving connection reliability of stacked chips

A stacked semiconductor chip package, comprising:

• a first semiconductor chip having a first connection structure, the first connection structure electrically connected to a bond pad on a first surface of the first semiconductor chip;
• and
• a second semiconductor chip having a second connection structure, the second connection structure electrically connected to a bond pad on a first surface of the second semiconductor chip and extending through the second semiconductor chip to a second surface of the second semiconductor chip, a portion of the second connection structure protruding from the second surface of the second semiconductor chip, and a portion of the protruding portion extending into the first connection structure such that the first and second connection structures are electrically connected.