Back to results
US 7,119,411 B2Granted
Interconnect structure for TFT-array substrate and method for fabricating the same
AssigneeAu Optronics Corporation
InventorKun-Hong Chen
Life of this patent
Estimating the term…
Abstract
An interconnect structure connecting two isolated metal lines in a non-display area of a TFT-array substrate. A first metal line is disposed on the substrate, covered with a first insulating layer. A second metal line is disposed on the first insulating layer and covered by a second insulating layer. ITO (indium tin oxide) wiring is disposed on the second insulating layer, electrically connecting the first and second metal lines. A passivation structure is disposed on the second insulating layer, with an opening therein to expose and surround the ITO wiring.
Claims6
An interconnect structure, comprising:
- a substrate;
- a plurality of first metal lines disposed on the substrate;
- a first insulating layer disposed on the substrate, covering the plurality of first metal lines;
- a plurality of second metal lines disposed on the first insulating layer;
- a second insulating layer covering the plurality of second metal lines;
- a plurality of ITO (indium tin oxide) wirings, each ITO wiring electrically connecting one of the plurality of first metal lines and one of the second metal lines respectively;
- a passivation structure disposed on the second insulating layer, wherein the passivation structure comprises a plurality of openings, wherein each of the opening exposes only one of corresponding ITO wirings, and each of the openings is separated from the adjacent opening by a surrounding wall;
- and
- a plurality of residue ITO rings remains along inner foots of the openings, wherein the residue ITO rings do not extend beyond the openings.
6 more elements
Dependencies are inferred from the claim text.