Field effect transistor and method for fabricating it

A field-effect transistor, comprising:

• at least one web-type elevation, which is arranged on a semiconductor substrate and has an upper surface and lateral surfaces;
• a first gate oxide layer, which is arranged at least on a part of the lateral surfaces of the web-type elevation;
• a first gate electrodes, which is arranged on the first gate oxide layer, the first gate electrode having an upper surface and lateral surfaces;
• a second gate oxide layer, which is arranged on the upper surface of the web-type elevation and the upper surface of the first gate electrode;
• a second gate electrode, which is arranged on the second gate oxide layer and the lateral surfaces of the first gate electrodes;
• and
• source and drain regions, which are arranged on the web-type elevations.

A method for fabricating a field-effect transistor, comprising:

• providing a semiconductor substrate with a first gate oxide layer applied thereon and a first gate electrode layer applied to the gate oxide layer;
• producing at least one web-type elevations with an upper surface and lateral surfaces, the first gate oxide layer and the first gate electrode layer being arranged on the upper surface;
• producing a second gate oxide layer at least on a part of the lateral surfaces of the web-type elevations and the first gate electrode layer;
• applying a second gate electrode layer is applied, so that the second gate electrode layer is arranged on the second gate oxide layer and the upper surface of the first gate electrode layer;
• and
• patterning the first and second gate electrode layers to form first and second gate electrodes and source and drain regions are produced.