Integrating metal layers with ultra low-K dielectrics
AssigneeACM Research, Inc.
InventorHui Wang
Life of this patent
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Abstract
In forming a layer of a semiconductor wafer, a dielectric layer is deposited on the semiconductor wafer. The dielectric layer includes material having a low dielectric constant. Recessed and non-recessed areas are formed in the dielectric layer. A metal layer is deposited on the dielectric layer to fill the recessed areas and cover the non-recessed areas. The metal layer is then electropolished to remove the metal layer covering the non-recessed areas while maintaining the metal layer in the recessed areas.
Claims28
A method of forming a layer of a semiconductor wafer comprising:
- depositing a dielectric layer, wherein a first sub-layer of the dielectric layer is deposited and a second sub-layer of the dielectric layer is deposited on the first sub-layer, wherein the second sub-layer has a low dielectric constant, and wherein the dielectric constant of the second sub-layer is lower than the dielectric constant of the first sub-layer;
- forming recessed and non-recessed areas in the dielectric layer;
- depositing a metal layer on the dielectric layer to fill the recessed areas and cover the non-recessed areas;
- and
- electropolishing the metal layer to remove the metal layer covering the non-recessed areas while maintaining the metal layer in the recessed areas.
A method of forming a layer on a semiconductor wafer comprising:
- depositing a dielectric layer, wherein a first sub-layer of the dielectric layer is deposited and a second sub-layer of the dielectric layer is deposited above the first sub-layer, and wherein the dielectric constant of the second sub-layer is lower than the dielectric constant silicon dioxide and the first sub-layer;
- forming recessed and non-recessed areas in the dielectric layer;
- depositing a metal layer to fill the recessed areas and cover the non-recessed areas;
- and
- electropolishing the metal layer to remove the metal layer covering the non-recessed areas.
A method of forming a layer on a semiconductor wafer comprising:
- depositing a first sub-layer of a dielectric layer;
- depositing a second sub-layer subsequent to the first sub-layer, the second sub-layer having a dielectric constant less than that of silicon dioxide and the first sub-layer;
- forming at least one trench in the second sub-layer;
- forming at least one via in the first sub-layer through the a least one trench formed in the second sub-layer;
- depositing a metal layer to fill the at least one trench formed in the second sub-layer and the at least one via formed in the first sub-layer;
- and
- electropolishing the metal layer.
Dependencies are inferred from the claim text.