US 7,118,997 B2 · Implantation of gate regions in semiconductor device fabrication

Abstract

A method for implanting gate regions essentially without implanting regions of the semiconductor layer where source/drain regions will be later formed. The method includes the steps of (a) providing (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, (iii) a gate region on the gate dielectric layer, wherein the gate region is electrically insulated from the semiconductor layer by the gate dielectric layer; (b) forming a resist layer on the gate dielectric layer and the gate region; (c) removing a cap portion of the resist layer essentially directly above the gate region essentially without removing the remainder of the resist layer; and (d) implanting the gate region essentially without implanting the semiconductor layer.

Claims17

Dependent claims

A semiconductor structure fabrication method, comprising the steps of:

(a) providing (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, (iii) a gate region on the gate dielectric layer, wherein the gate region is electrically insulated from the semiconductor layer by the gate dielectric layer, and (iv) a proton-generating region on the gate region wherein the proton-generating region comprises free protons;
(b) forming a resist layer on the gate dielectric layer and the proton-generating region;
and
(c) thermally diffusing free protons from the proton-generating region into the resist layer.

1 more element

A semiconductor structure fabrication method, comprising the steps of:

(a) providing (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, (iii) a gate region on the gate dielectric layer, wherein the gate region is electrically insulated from the semiconductor layer by the gate dielectric layer;
(b) forming a resist layer on the gate dielectric layer and the gate region;
(c) removing a cap portion of the resist layer directly above the gate region essentially in a direction perpendicular to an interfacial surface between the semiconductor layer and the gate dielectric layer;
and
(d) implanting the gate region essentially without implanting regions of the semiconductor layer,
wherein step (a) comprises the step of providing a proton-generating region on the gate region, wherein the proton-generating region comprises free protons, and
wherein steps (b) comprises the step of forming the resist layer on the proton-generating region and the gate dielectric layer, wherein the resist layer comprises a first material that, when passed through by protons, becomes a second material such that there exists at least an etching process that can etch away the second material essentially without etching the first material.

4 more elements

A semiconductor structure fabrication method, comprising the steps of:

(a) providing (i) a semiconductor layer, (ii) a gate dielectric layer on the semiconductor layer, (iii) a gate region on the gate dielectric layer, wherein the gate region is electrically insulated from the semiconductor layer by the gate dielectric layer;
(b) forming a resist layer on the gate dielectric layer and the gate region;
(c) removing the resist layer except a cap portion of the resist layer directly above the gate region essentially in a direction perpendicular to an interfacial surface between the semiconductor layer and the gate dielectric layer;
(d) forming source/drain (SID) protection regions on side walls of the gate region and the cap portion of the resist layer;
(e) removing the. cap portion of the resist layer;
and
(f) implanting the gate region through the space of the removed cap portion essentially without implanting regions of the semiconductor layer through the S/D protection regions.

4 more elements

Dependencies are inferred from the claim text.

Implantation of gate regions in semiconductor device fabrication

Life of this patent

Implantation of gate regions in semiconductor device fabrication

Life of this patent

Abstract

Claims17