Method of manufacturing a floating gate and method of manufacturing a non-volatile semiconductor memory device comprising the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJin-Kuk Chung, Chang-Rok Moon
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Abstract
A method of manufacturing a floating gate provides an enhancement for the efficiencies of electron charge and injection. First, a conductive pattern, constituting the floating gate is formed on a substrate. A first insulation layer is formed on a sidewall of the conductive pattern, and then a second insulation layer is formed at an upper portion of the conductive pattern in ways that increase the sharpness of an edge portion where the sidewall and upper portions of the conductive pattern meet. Therefore, electron transference from the floating ate to a control gate is facilitated.
Claims22
A method of manufacturing a floating gate, comprising:
- forming a conductive pattern on a substrate, wherein the conductive pattern has a sidewall, an upper portion, and an edge portion where the upper portion and sidewall meet;
- forming a first insulation layer on the sidewall of the conductive pattern in a way that sharpens the edge portion of the conductive pattern, whereby the edge portion has a first sharpness;
- and
- subsequently forming a second insulation layer on the upper portion of the conductive pattern in a way that further sharpens the edge portion, whereby the edge portion has a second sharpness greater than said first sharpness.
A method of manufacturing a non-volatile semiconductor memory device, comprising:
- forming a floating gate on a substrate, the floating gate comprising a first conductive pattern having a sidewall, an upper portion, and an edge portion where the upper portion and sidewall meet;
- forming a first insulation layer on the sidewall of the first conductive pattern;
- forming a control gate on the first insulation layer and the first conductive pattern, the control gate comprising a second conductive pattern;
- and
- subsequently forming a second insulation layer on the upper portion of the first conductive pattern so as to be located between the first conductive pattern and the second conductive pattern.
A method of manufacturing a non-volatile semiconductor memory device, comprising:
- sequentially forming a first insulation layer and a first conductive layer on a substrate;
- etching the first conductive layer to pattern the first conductive layer in a first direction;
- forming a second insulation layer on the etched first conductive layer;
- forming a first conductive pattern by etching the first insulation layer and the etched first conductive layer so as to pattern the first insulation layer and the etched first conductive layer in a second direction;
- forming a first oxide layer by oxidizing a sidewall of the first conductive pattern;
- forming a second conductive layer on the substrate including over the first conductive pattern and the second insulation layer;
- forming a second conductive pattern by etching the second conductive layer;
- forming a source region in the substrate adjacent the first conductive pattern;
- etching the second insulation layer from atop the first conductive pattern;
- forming a second oxide layer by oxidizing an upper portion of the first conductive pattern;
- and
- forming a drain region in the substrate adjacent the second conductive pattern.
Dependencies are inferred from the claim text.