Method of making transistor with strained source/drain
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYun-Hsiu Chen, Syun-Ming Jang
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Abstract
A method of fabricating a transistor comprises the steps of: forming a gate electrode above a substrate made of a first semiconductor material having a first lattice spacing, forming recesses in the semiconductor substrate at respective locations where a source region and a drain region are to be formed, epitaxially growing a second semiconductor material having a second lattice spacing different from the first lattice spacing in the recesses, and implanting a dopant in the second semiconductor material after the growing step.
Claims12
A method of fabricating a transistor, comprising the steps of:
- forming a gate electrode above a substrate made of a first semiconductor material having a first lattice spacing;
- forming a first spacer adjacent to the gate electrode;
- forming recesses in the semiconductor substrate at respective locations where a source region and a drain region are to be formed-after forming the first spacer;
- epitaxially growing a second semiconductor material having a second lattice spacing different from the first lattice spacing to fill the recesses up to a surface of the substrate, wherein the transistor is a PMOS transistor, the PMOS transistor is a component in a CMOS device, and an NMOS transistor of the CMOS device is formed without growing the second semiconductor material in source and drain regions of the NMOS device;
- implanting a dopant in the second semiconductor material after the growing step;
- and
- removing the first spacer after the implantation step.
A method of fabricating a CMOS device comprising a PMOS transistor and an NMOS transistor, comprising the steps of:
- forming a gate electrode for the PMOS transistor and for the NMOS transistor above a substrate made of a first semiconductor material having a first lattice spacing;
- forming a first spacer adjacent to the gate electrodes;
- forming recesses in the semiconductor substrate at respective locations adjacent the gate electrode of the PMOS transistor, where a source region and a drain region are to be formed after forming the first spacer;
- epitaxially growing a second semiconductor material having a second lattice spacing different from the first lattice spacing to fill the recesses up to a surface of the substrate, wherein the second semiconductor material is not formed in source and drain regions of the NMOS device;
- removing the first spacer after the growing step;
- and
- implanting dopants in the PMOS and NMOS transistors after the growing step.
Dependencies are inferred from the claim text.