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US 7,118,942 B1Granted
Method of making atomic integrated circuit device
OwnerChou H. Liinventor
Life of this patent
Estimating the term…
Abstract
A method of mass-producing a solid state device comprises providing an atomically smooth, solid state material layer no more than 40 Angstroms thick. This layer is uniformly and defect-freely bonded onto a substrate to provide an acceptable device yield.
Claims54
A method of mass-producing a solid state device comprising:
- supplying a solid-state material substrate having a top surface;
- and
- providing a solid state material layer no more than 40 Angstroms thick having at least one atomically smooth major surface, and positioned on the top surface of the substrate;
- at least a lower surface of the solid state material layer being metallurgically bonded onto a selected portion of the top surface of the solid state material substrate, sufficiently uniformly and defect-freely to provide an acceptable device yield.
1 more element
A method for mass-producing a solid state device comprising:
- supplying a solid state material substrate;
- providing a solid state material pocket positioned on a selected surface of the substrate;
- and
- forming a solid state material layer less than 40 angstroms thick and metallurgically bonded onto a selected surface of the substrate;
- said metallurgical bonding being so sufficiently uniform and defect-free as to provide a thermochemically stable bonding interface and to give a manageable device yield.
2 more elements
A method for mass-producing a solid state device comprising:
- supplying a solid state material substrate having a first conductivity type:
- supplying a solid state material pocket of a second conductivity type and contacting a top surface of the solid substrate;
- providing a signal-translating, interfacial rectifying barrier region where the solid pocket contacts the solid substrate;
- and
- forming an electrically insulating, solid state material layer metallurgically bonded onto selected portions of both the solid substrate and the solid pocket, sufficiently uniformly and defect-freely to achieve a manageable device yield;
- there being no thermally and electrically insulating voids and microcracks to cause unstable electrical contacts, unwanted instabilities;
- leakage current;
- low breakdown voltage;
- boron penetration;
- and poor device performance, reproducibility, yield, reliability, and resistance to ambient particularly as to moisture.
7 more elements
A method of mass-producing a solid state device of less than 0.1 micron in size, with nanometer accuracy, comprising:
- supplying a semiconductor material substrate of one conductivity type;
- and
- providing a semiconductor material pocket positioned on said substrate and having a conductivity type opposite to said one conductivity type thereby forming an electrically rectifying barrier between said substrate and said pocket;
- a lower surface of the semiconductor material pocket being chemically bonded, with a metallurgically graded seal, onto a selected portion of a top surface of said substrate, sufficiently uniformly and defect-freely to provide an acceptable device yield.
1 more element
Dependencies are inferred from the claim text.