Fabrication of a ferromagnetic inductor core and capacitor electrode in a single photo mask step
AssigneeTexas Instruments Incorporated
InventorsKenneth D. Brennan, Satyavolu S. Papa Rao
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Abstract
A method of manufacturing an integrated circuit on a semiconductor wafer. The method comprising forming a bottom plate of a capacitor 50a and a bottom portion of an induction coil 50a, forming an etch stop layer 250′, forming a ferromagnetic capacitor top plate 20a and a ferromagnetic core 20b, forming a top portion of the induction coil 50b plus vias 50c that couple the top portion of the induction coil 50b to the bottom portion of the induction coil 50c.
Claims22
A method of manufacturing an integrated circuit on a semiconductor wafer comprising:
- forming a FEOL structure over said semiconductor wafer;
- forming a first metal interconnect layer over said FEOL structure, said first metal interconnect layer containing a bottom plate of a capacitor and a bottom portion of an induction coil;
- forming an etch stop layer of a second metal interconn ect layer over said first metal interconnect layer;
- forming a ferromagnetic layer over said etch stop layer;
- forming a photoresist layer over said ferromagnetic layer;
- patterning said photoresist layer;
- etching said ferromagnetic layer to form a top plate of said capacitor and also a core that is proximate to said bottom portion of an induction coil;
- forming a dielectric layer of said second metal interconnect layer over said semiconductor wafer;
- and
- forming within said dielectric layer of said second metal interconnect layer a top portion of said induction coil plus vias that couple said top portion of said induction coil to said bottom portion of said induction coil.
A method of manufacturing an integrated circuit on a semiconductor wafer comprising:
- forming a FEOL structure over said semiconductor wafer;
- forming a first metal interconnect layer over said FEOL structure, said first metal interconnect layer containing a copper bottom plate of a capacitor and a copper bottom portion of an induction coil;
- forming a silicon nitride first etch stop layer of a second metal interconnect layer over said first metal interconnect layer, said capacitor having a portion of said etch stop layer as a dielectric;
- forming a cobalt ferromagnetic layer over said silicon nitride first etch stop layer;
- forming a photoresist layer over said cobalt ferromagnetic layer;
- patterning said photoresist layer;
- etching said cobalt ferromagnetic layer to form a top plate of said capacitor and also a core that is proximate to said copper bottom portion of an induction coil;
- forming a silicon carbide second etch stop layer of said second metal interconnect layer over said semiconductor wafer;
- forming a low-k dielectric layer of said second metal interconnect layer over said semiconductor wafer;
- and
- forming a copper top portion of said induction coil plus copper vias that couple said copper top portion of said induction coil to said copper bottom portion of said induction coil.
Dependencies are inferred from the claim text.