Generation of design views having consistent input/output pin definitions

An apparatus for generating consistent connection data for a first circuit design embedded in a second circuit design, comprising:

• means for establishing in a master file design data including for each pin in the first circuit design, a hardware description language (HDL) pin name from an HDL description of the first circuit design, a schematic pin name of the second circuit design to which the pin of the first circuit is to connect, a signal direction associated with the pin, and a name of a clock to trigger a signal on the pin;
• and
• means for generating a plurality of design views from the master file, each design view having a unique format relative to the other design views and including for each pin in the first circuit design, at least the HDL pin name, the associated schematic pin name from the second circuit design, and a signal direction associated with the pin.