Method of estimating performance of integrated circuit designs using state point identification
AssigneeMagma Design Automation, Inc.
InventorsArvind Srinivasan, Haroon Chaudhri
Life of this patent
Estimating the term…
Abstract
A technique to verify, evaluate, and estimate the performance of an integrated circuit is embodied in a computer software program that is executable by a computer system. To estimate performance, the integrated circuit design is partitioned into strongly coupled components and state points are identified. The technique accurately estimates of the performance (e.g., transient delays) of an integrated circuit, and has fast execution times. The technique is applicable to small circuits having relatively few transistors, and especially well suited for integrated circuits having millions of transistors and components. The technique handles the effects of deep-submicron integrated circuit technology.
Claims20
A method of estimating the performance of an integrated circuit design comprising:
- dividing the integrated circuit design into a plurality of channel-connected components, wherein a channel-connected component comprises nodes and transistors reachable by tracing source-drain connections of the transistors;
- identifying channel-connected components that are connected in a feedback loop, wherein a feedback loop of channel-connected components comprises an output of a first channel-connected component driving an input of a second channel-connected component and an output of the second channel-connected component driving an input of the first channel-connected component;
- and
- merging channel-connected components connected in a feedback loop to form first strongly coupled components.
A computer program product stored on a computer-readable storage medium for determining the performance of a circuit design, the computer program product comprising:
- code for dividing the circuit design into a plurality of channel-connected components, wherein a channel-connected component comprises nodes and transistors reachable by tracing source-drain connections of the transistors;
- code for identifying channel-connected components that are connected in a feedback loop, wherein a feedback loop of channel-connected components comprises an output of a first channel-connected component driving an input of a second channel-connected component and an output of the second channel-connected component driving an input of the first channel-connected component;
- and
- code for merging channel-connected components connected in a feedback loop to form first strongly coupled components.
A system embodied using computer-readable medium to determine the performance of a circuit design comprising:
- a first code component to divide the circuit design into a plurality of channel-connected components, wherein a channel-connected component comprises nodes and transistors reachable by tracing source-drain connections of the transistors;
- a second code component to identify channel-connected components that are connected in a feedback loop, wherein a feedback loop of channel-connected components comprises an output of a first channel-connected component driving an input of a second channel-connected component and an output of the second channel-connected component driving an input of the first channel-connected component;
- and
- a third code component to merge channel-connected components connected in a feedback loop to form first strongly coupled components.
Dependencies are inferred from the claim text.