Method for physical parameter extraction for transistor model
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShou-Zen Chang, Wei-Ming Chen, Hsien-Pin Hu, Chia-Nan Lee
Life of this patent
Estimating the term…
Abstract
A method is disclosed for modifying a device dimension extraction model. After collecting in-line data with regard to at least one feature of a device for one or more layouts, a proximity and linearity effect with regard to the feature based on the collected data is determined. Further, the device's electrically active region (OD) drawn size effect with regard to the feature is also determined based on the collected data. The dimension extraction model is modified based on at least two of the above three characterized effects.
Claims21
A method for modifying a device dimension extraction model comprising:
- collecting in-line data that represents at least one feature of a device for one or more layouts;
- characterizing a proximity effect on the feature based on the collected data;
- characterizing a linearity effect on the feature based on the collected data;
- characterizing the device's electrically active region (OD) drawn size effect on the feature based on the collected data;
- modifying the dimension extraction model based on at least two of the above three characterized effects;
- and
- applying the modified model to extract one or more physical dimensions of the feature.
A method for generating a dimension extraction model for reducing process induced errors in making a device, the method comprising:
- collecting in-line data that represents a poly gate and an active region under the poly gate (OD) of a device for one or more layouts;
- characterizing a proximity effect on the poly gate and OD based on the collected data;
- characterizing a linearity effect on the poly gate and OD based on the collected data;
- characterizing the device's OD drawn size effect on the poly gate based on the collected data;
- modifying the dimension extraction model based on at least two of the above three characterized effects;
- and
- applying the modified model to extract one or more physical dimension parameters for a semiconductor device.
A computer program embedded on a computer-readable medium for modifying a dimension extraction model for reducing process induced errors in making a semiconductor device, the program comprising instructions for:
- collecting in-line data that represents a poly gate and an active region under the poly gate (OD) of a device for one or more layouts;
- characterizing a proximity effect on the poly gate and OD based on the collected data;
- characterizing a linearity effect on the poly gate and OD based on the collected data;
- characterizing the device's OD drawn size effect on the poly gate based on the collected data;
- modifying the dimension extraction model based on at least two of the above three characterized effects;
- and
- applying the modified model to extract one or more physical dimension parameters for the semiconductor device.
Dependencies are inferred from the claim text.