Branch metric computation and add-compare-select operation in viterbi decoders
AssigneeMediatek Inc.
InventorsKuo-Ming Wu, Shih-Chung Yin
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AssigneeMediatek Inc.
InventorsKuo-Ming Wu, Shih-Chung Yin
Estimating the term…
An apparatus for branch metric computation and add-compare-select operation in a rate 1/n Viterbi decoder with a constraint length of K. The apparatus of the invention includes a branch metric generator and an add-compare-select unit. The branch metric generator calculates a plurality of branch metrics each of which is a measure between a currently received data symbol and a corresponding branch label. The add-compare-select unit can generate respective decision bits for a pair of odd and even states at next instant with a novel pre-computational architecture. Further, a local winner between the odd and even states is predetermined in a manner providing reduction of the activity required by the computation. Thus the add-compare-select unit outputs a path metric of the local winner, whereby a saving of half the output number of path metrics is achieved.
An add-compare-select apparatus for a Viterbi decoder with a constraint length of K, comprising:
An apparatus for branch metric computation and add-compare-select operation in a rate 1/n Viterbi decoder with a constraint length of K, comprising:
A rate 1/n Viterbi decoder with a constraint length of K, comprising:
Dependencies are inferred from the claim text.