Method and device for generating digital signal patterns

A method for testing dynamic digital circuits by outputting digital electrical signal pattern groups, which comprises:

• providing an addressable memory and a control logic circuit, both as part of a common integrated semiconductor circuit;
• providing the integrated semiconductor circuit as a built outside test module remotely from a conventional test unit;
• forming a multiplicity of different signal pattern groups each containing a multiplicity of different signal patterns in an addressable memory;
• storing the signal pattern groups each in advance in the memory at an address peculiar to the respective signal pattern group;
• also storing under each address of each signal pattern group in the memory in advance a definition in the form of a branch address determining a read-out order of the stored signal pattern groups and assigning a memory position for a signal pattern group to be read out next;
• and
• reading out from the memory and outputting the signal pattern groups in response to corresponding addressing as a function of the respective current address and of a control signal to be fed in from the control logic circuit, when the control signal is not fed in, in a sequence defined by a serial address or a memory sequence, and, when the control signal is fed in, in a sequence determined by the respective branch address.