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US 7,117,341 B2Granted
Storing and selecting multiple data streams in distributed memory devices
AssigneeXilinx, Inc.
InventorArthur H. Khu
Life of this patent
Estimating the term…
Abstract
Prior art storage techniques have certain limitations, including requiring additional external resources to implement and not making use of all of the available storage space. A method and apparatus using a header table and, in some cases, an alternative access interface are described which allow for more efficient use of available memory space, permit an arbitrary number of data streams to be stored and accessed with a minimal interface, and provide for a simple serial connection to chain multiple memory devices together.
Claims16
A method for loading a data stream comprising:
- supplying an identifier of the data stream to a header table;
- and
- based on the identifier of the data stream, supplying a skip bit and a start address of the data stream to a memory device;
- wherein the skip bit is a single bit indicating whether the supplied start address is a valid or a don't care value.
1 more element
A memory device comprising:
- a memory addressing structure wherein the memory addressing structure can provide a start block and a skip bit for at least one data stream;
- a skip bit register for holding the skip bit;
- and
- a start address register for holding an address corresponding to the start block;
- wherein the skip bit register is a one-bit register, and
- wherein the skip bit indicates whether the address corresponding to the start block is a valid or a don't care value.
3 more elements
A chain of memory devices comprising:
- a first memory device comprising:
- a first table, wherein the table can store a start block and a skip bit for at least one data stream;
- a first start address register;
- a first skip bit register;
- and
- a first chip enable output terminal;
- a second memory device comprising:
- a second table, wherein the table can store a start block and a skip bit for at least one data stream;
- a second start address register;
- a second skip bit register;
- and
- a second chip enable input terminal connected to the first chip enable output terminal.
9 more elements
Dependencies are inferred from the claim text.