Apparatus to map virtual pages to disparate-sized, non-contiguous real pages
AssigneeIntel Corporation
InventorsNagasubramanian Gurumoorthy, Shivaprasad Sadashivaiah
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AssigneeIntel Corporation
InventorsNagasubramanian Gurumoorthy, Shivaprasad Sadashivaiah
Estimating the term…
A data processing system includes at least one system processor, chipset core logic, main memory to store computer software and data including operating system software, and a graphics address remapping table (GART). The chipset logic operates on first-sized real memory pages, while the operating system operates on larger, second-sized virtual memory pages. In an embodiment GART driver software maps each virtual page to Z continuous or non-contiguous real pages by filling up the GART with Z entries per virtual page, where Z is the rounded integer number of first-sized pages per second-sized page. In another embodiment, an address translation function converts a target address, corresponding to an address within a virtual page, issuing from a processor into a second address, corresponding to a base address of a real page in main memory. Also described are an integrated circuit and a computer-readable medium to map memory pages of disparate sizes.
A system comprising:
A method performed by a data processing system comprising a system processor, a graphics processor, and a memory coupled to the processors, the memory capable of storing real pages of size X, the memory storing an address translation driver comprising a plurality of address translation instructions, and at least one of the processors capable of executing selected ones of the address translation instructions and of executing instructions within an operating system organized in virtual pages of size Y, wherein X and Y are positive integers, and wherein Y is greater than X, the method comprising the following operations:
A data processing system comprising a system processor, a graphics processor, a local memory, and a main memory coupled to the processors and to the local memory, the main memory capable of storing real pages of size X, the local memory to store an address translation driver comprising a plurality of address translation instructions, and at least one of the processors capable of executing selected ones of the address translation instructions and of executing instructions within an operating system organized in virtual pages of size Y, wherein X and Y are positive integers, and wherein Y is greater than X, the address translation instructions comprising the following operations:
A computer-readable medium having computer-executable instructions that, when executed, result in operations being performed in a data processing system, the data processing system comprising a system processor, a graphics processor, and a memory coupled to the processors, the memory capable of storing real pages of size X, the memory storing an address translation driver comprising a plurality of address translation instructions, and at least one of the processors capable of executing selected ones of the address translation instructions and of executing instructions within an operating system organized in virtual pages of size Y, wherein X and Y are positive integers, and wherein Y is greater than X, the operations comprising:
Dependencies are inferred from the claim text.