Hypertransport data path protocol

A method for transferring processed data from a second device to a first device interconnected by a bus, the method comprising:

• processing the data at the second device;
• storing the processed data in a data buffer referenced by a buffer descriptor;
• transferring the buffer descriptor from the second device to the first device, without having to perform a read transaction over the bus;
• retrieving, by the first device, the processed data from the data buffer;
• and
• storing the buffer descriptor in a pool of free buffer descriptors available to the first device.

An apparatus for transferring data between a first device and a second device interconnected by a bus, the apparatus comprising:

• means for receiving the data at the first device;
• means for retrieving, by the first device, a first buffer descriptor from a pool of free buffer descriptors, without having to perform a read transaction over the bus;
• means for storing the data in a first data buffer referenced by the first buffer descriptor;
• and
• means for transferring the first buffer descriptor over the bus from the first device to the second device.

An apparatus for transferring processed data from a second device to a first device interconnected by a bus, the apparatus comprising:

• means for processing the data at the second device;
• means for storing the processed data in a data buffer referenced by a buffer descriptor;
• means for transferring the buffer descriptor from the second device to the first device, without having to perform a read transaction over the bus;
• means for retrieving, by the first device, the processed data from the data buffer;
• and
• means for storing the buffer descriptor in a pool of free buffer descriptors available to the first device.

A computer-readable media including instructions for execution by a processor, the instructions for a method of transferring data between a first device and a second device interconnected by a bus, the method comprising:

• receiving the data at the first device;
• retrieving, by the first device, a first buffer descriptor from a pool of free buffer descriptors, without having to perform a read transaction over the bus;
• storing the data in a first data buffer referenced by the first buffer descriptor;
• and
• transferring the first buffer descriptor over the bus from the first device to the second device.

A computer-readable media including instructions for execution by a processor, the instructions for a method of transferring processed data from a second device to a first device interconnected by a bus, the method comprising:

• processing the data at the second device;
• storing the processed data in a data buffer referenced by a buffer descriptor;
• transferring the buffer descriptor from the second device to the first device, without having to perform a read transaction over the bus;
• retrieving, by the first device, the processed data from the data buffer;
• and
• storing the buffer descriptor in a pool of free buffer descriptors available to the first device.

A system configured to transfer data between devices interconnected by a bus, the system comprising:

• a first device including:
• a central processing unit (CPU) adapted to execute software code that instructs the CPU how to process the data, and
• a memory having a plurality of memory locations addressable by the CPU, the memory adapted to store (i) a buffer cache containing one or more data buffers in which the data can be stored and (ii) a To-CPU descriptor ring configured to store one or more buffer descriptors referencing data buffers in the buffer cache;
• and
• a second device coupled to the first device over the bus, the second device including:
• a To-CPU data FIFO configured to store the data when the data is received at the second device,
• a free buffer cache configured to store a pool of free buffer descriptors, each free buffer descriptor referencing a memory location of a corresponding data buffer in the first device's buffer cache, wherein each data buffer referenced by a free buffer descriptor is available to store at least a portion of the data stored in the To-CPU data FIFO, and
• a To-CPU direct memory access (DMA) engine configured to (i) acquire a free buffer descriptor from the pool of free buffer descriptors without performing a read transaction over the bus, (ii) transfer the data from the To-CPU data FIFO, over the bus, to the data buffer referenced by the acquired free buffer descriptor, (iii) enqueue the acquired descriptor at an appropriate location in the To-CPU descriptor ring and (iv) notify the CPU that the data has been transferred to the first device.