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AssigneeNVIDIA Corporation
InventorsNicholas J. Foskett, Robert J. Prevett, Jr., Sean Treichler
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A pipelined circuit configured to generate a Taylor's series approximation at least one function, preferably at least one of the reciprocal and the reciprocal square root, of an input value. The circuit is preloaded with or configured to generate a predetermined set of Taylor's series coefficients for each segment of the input value range. Other aspects of the invention are methods for determining preferred parameters for elements of such a circuit, a circuit designed in accordance with such a method, and a system (e.g., a pipelined graphics processor) for and method of pipelined graphics data processing using any embodiment of the circuit. The preferred parameters are determined by minimizing the circuit's size subject to constraints on input and output value format and output accuracy, assuming a specific function to be approximated and a specific degree for the approximation but allowing variation of parameters such as coefficient width and number of input value range segments.
A pipelined circuit for pipelined processing of graphics data for generating an output word in response to an input word indicative of an input value and a control word, where the output word is indicative of a Taylor's series approximation of a reciprocal of the input value or a reciprocal of a square root of the input value depending on the control word, said circuit including:
A system for pipelined processing of graphics data, including:
A method for pipelined processing of graphics data to generate an output word in response to an input word of the data, wherein the input word is indicative of an input value and such that the output word is indicative of a Taylor's series approximation of at least one of a reciprocal of the input value and a reciprocal of the square root of the input value, said method including the steps of:
Dependencies are inferred from the claim text.