Co-simulation verilog/PLI and system C modules using remote procedure call
OwnerQiyong Bianinventor
Life of this patent
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Abstract
A Verilog/PLI module that simulates behavior of an electronic system is co-simulated in a clock-accurate manner with a System C module that models the behavior of a component of the electronic system using a remote procedure call (RPC). Adding RPC functionality to the Verilog/PLI and System C modules facilitates exchanging parameters between the modules. The RPC is used to transfer process control to the SystemC module, after execution of which control is returned to the Verilog/PLI module. A return value is also returned to the Verilog/PLI module; this return value represents output signals associated with the System C module.
Claims30
A computer-implemented method, comprising:
- executing a client module configured to simulate behavior of an electronic system;
- using a remote procedure call (RPC) to transfer process control to a server module that models behavior of a component of the electronic system;
- controllably advancing simulation time;
- and
- returning process control to the client module after execution of the server module.
A computer-readable medium having computer-executable instructions for:
- executing a client module configured to simulate behavior of an electronic system;
- using a remote procedure call (RPC) to transfer process control to a server module that models behavior of a component of the electronic system;
- controllably advancing simulation time;
- and
- returning process control to the client module after execution of the server module.
A computer-implemented method, comprising:
- executing a Verilog/PLI module configured to simulate behavior of an electronic system;
- using a remote procedure call (RPC) to transfer process control to a System C module that models behavior of a component of the electronic system;
- suspending operation of the System C module;
- advancing simulation time by one cycle of a clock signal;
- and
- returning a return value to the Verilog/PLI module after execution of the System C module, the return value representing a plurality of output signals.
A computer-readable medium having computer-executable instructions for:
- executing a Verilog/PLI module configured to simulate behavior of an electronic system;
- using a remote procedure call (RPC) to transfer process control to a System C module that models behavior of a component of the electronic system;
- suspending operation of the System C module;
- advancing simulation time by one cycle of a clock signal;
- and
- returning a return value to the Verilog/PLI module after execution of the System C module, the return value representing a plurality of output signals.
A computer-implemented method, comprising:
- executing a Verilog/PLI module configured to simulate behavior of an electronic system;
- using a remote procedure call (RPC) to transfer process control to a System C module that models behavior of a component of the electronic system, the System C module having a plurality of global signals mapped to at least one of an input port of the System C module and an output port of the System C module;
- suspending operation of the System C module;
- advancing simulation time by one cycle of a clock signal having a 50% duty cycle;
- and
- returning a pointer associated with a return value to the Verilog/PLI module after execution of the System C module, the return value representing a plurality of output signals.
A computer-readable medium having computer-executable instructions for:
- executing a Verilog/PLI module configured to simulate behavior of an electronic system;
- using a remote procedure call (RPC) to transfer process control to a System C module that models behavior of a component of the electronic system, the System C module having a plurality of global signals mapped to at least one of an input port of the System C module and an output port of the System C module;
- suspending operation of the System C module;
- advancing simulation time by one cycle of a clock signal having a 50% duty cycle;
- and
- returning a pointer associated with a return value to the Verilog/PLI module after execution of the System C module, the return value representing a plurality of output signals.
Dependencies are inferred from the claim text.