Data synchronization apparatus and method

An apparatus comprising:

• a first means for transmitting first data;
• a second means for transmitting second data;
• a third means coupled to the first and second means and configured to receive the first and second data,
• wherein the third means is configured to transmit the first and second data to first and second outputs, respectively, of the third means;
• when the first data is received by the third means before the second data, the third means is configured to delay transmission of the first data relative to the transmission of the second data such that the second data is received at the second output when the first output receives the first data.

A method comprising:

• a circuit receiving first data via a first communication link;
• the circuit receiving second data via a second communication link;
• transmitting the first and second data to first and second outputs, respectively, of the circuit;
• when the first data is received by the circuit before the second data, the circuit delaying transmission of the first data relative to the transmission of the second data such that the second data is received at the second output when the first output receives the first data.

A method comprising:

• a first shift register receiving a first multi-bit data, wherein the first shift register comprises multiple shift register stages;
• shifting the first multi-bit data through one or more stages of the first shift register;
• a second shift register receiving a second multi-bit data, wherein the second shift register comprises multiple shift register stages, wherein second shift register receives the second multi-bit data before the first shift register receives the first multi-bit data;
• shifting the second multi-bit data through one or more stages of the second shift register;
• concatenating the first and second multi-bit data before the first and second multi-bit data are shifted into nth and mth stages of the first and second shift registers, respectively, wherein m is greater than n.

A method comprising:

• transmitting first and second delimiters over first and second communication links, respectively;
• inputting the first delimiter into an input stage of a first shift register after transmitting the first delimiter over the first communication link, wherein the first shift register comprises multiple stages;
• generating a first delimiter detection signal in response to inputting the first delimiter into the input stage of the first shift register;
• shifting the first delimiter into another stage of the first shift register;
• inputting the second delimiter into an input stage of a second shift register after transmitting the second delimiter over the second communication link, wherein the second shift register comprises multiple stages;
• generating a second delimiter detection signal in response to inputting the second delimiter into the input stage of the second shift register;
• concatenating the first delimiter stored in the another stage of the first register with the second delimiter stored in the input stage of the second shift register, wherein the first and second delimiters are concatenated in response to generating the first and second delimiter detection signals.