US 7,116,737 B2 · Apparatus for signaling that a predetermined time value has elapsed

Abstract

The present invention provides an apparatus for signaling that a predetermined time value has elapsed, having a device for acquiring and storing the amplitude value of a clock signal at an acquisition instant in the temporal profile of the clock signal. A device is provided for continuously comparing the acquired and stored amplitude value of the clock signal with an instantaneous amplitude value of the clock signal and for outputting a comparison signal which has a first logic state if the instantaneous amplitude value of the clock signal is less than the stored amplitude value and has a second logic state if the instantaneous amplitude value of the clock signal is greater than the stored amplitude value. A device is also provided for counting the number of logic states of the comparison signal which occur after the acquisition instant, and for signaling that the predetermined time value has elapsed if the counted number of logic states is equal to a predetermined number of logic states which corresponds temporally to the predetermined time value.

Claims23

Dependent claims

Apparatus (100) for signaling that a predetermined time value has elapsed, having:

a device (102) for acquiring and storing the amplitude value (SH) of a clock signal (CLK;
CLK1, CLK2) at an acquisition instant (t0) in the temporal profile of the clock signal (CLK;
CLK1, CLK2), the clock signal (CLK;
CLK1, CLK2) having, during a period (T) thereof, a monotonically rising section and a monotonically falling section;
a device (116) for continuously comparing the acquired and stored amplitude value (SH) of the clock signal (CLK;
CLK1, CLK2) with an instantaneous amplitude value of the clock signal (CLK;
CLK1, CLK2) and for outputting a comparison signal (COMP), which has a first logic state if the instantaneous amplitude value of the clock signal (CLK;
CLK1, CLK2) is less than the stored amplitude value (SH) of the clock signal (CLK;
CLK1, CLK2), and has a second logic state if the instantaneous amplitude value of the clock signal (CLK;
CLK1, CLK2) is greater than the stored amplitude value (SH) of the clock signal (CLK;
CLK1, CLK2);
and
a device (124) for counting the number of logic states of the comparison signal (COMP) which occur after the acquisition instant (t0), and for signaling that the predetermined time value has elapsed if the counted number of logic states is equal to a predetermined number of logic states which corresponds temporally to the predetermined time value.

10 more elements

Dependencies are inferred from the claim text.

Apparatus for signaling that a predetermined time value has elapsed

Life of this patent

Apparatus for signaling that a predetermined time value has elapsed

Life of this patent

Abstract

Claims23