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US 7,116,636 B2Granted
Data rate adjuster using transport latency
AssigneeNorthrop Grumman Corporation
InventorStephen K. Vernon
Life of this patent
Estimating the term…
Abstract
An apparatus and method for reducing the data rate in a network using a delay processor. Since an increase in the data rate can overwhelm parts of the network hardware, such as a router, a delay processor is introduced so that data is delayed by a fixed amount so as to lower the data rate. A configuration table determines the amount of delay. A slowly changing amount of delay can be used in place of a fixed amount.
Claims14
A method of controlling a data rate in a network, comprising:
- placing data packets into a data stream in a network;
- routing said data stream through a delay device;
- receiving the data rate as an input to a low pass filter;
- delaying the selected data of the data stream in said network by storing the selected data in memory buffers for a variable delay amount to control the data rate to increase latency of the network;
- and
- determining the amount of time the selected data is stored in the memory buffers based on an amount of delay stored in a configuration table, the amount of delay being variably controlled by an output of the low pass filter.
3 more elements
An apparatus for controlling a data rate in a network, comprising:
- at least one first processor connected to said network;
- at least one second processor connected to said network;
- and
- a delay processor for controlling the data rate in said network, the delay processor comprising a low pass filter operative to receive the data rate as an input, the delay processor being operative to store data packets in a plurality of memory buffers for a variable amount of time and releasing the data packets after the variable amount of time to increase latency of the network, the delay processor comprising a clock circuit and a controller operative to determine the fixed amount of time the data packets are stored in the memory buffers based on an amount of delay stored in a configuration table, the amount of delay being variably controlled by an output of the low pass filter, the controller being further operative to store a release time in the memory buffers along with the data packets, the release time corresponding to a time at which the data packets are to be released from the memory buffers by the controller.
1 more element
An apparatus for controlling a data rate in the network, comprising:
- at least one first processor connected to said network;
- at least one second processor connected to said network;
- and
- a delay processor for controlling the data rate in said network, said delay processor delaying data in said network by storing the data in memory buffers and releasing the data after a delay, the amount of the delay being variably controlled by the output of a low pass filter, where the low pass filter receives the data rate as an input, the delay processor comprising a clock circuit and a controller operative to determine the amount of time the data is stored in the memory buffers based on the variably controlled amount of delay being stored in a configuration table, the controller being further operative to store a release time in the memory buffers along with the data, the release time corresponding to a time at which the data is to be released from the memory buffers by the controller.
1 more element
Dependencies are inferred from the claim text.