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US 7,116,600 B2Granted
Memory device having terminals for transferring multiple types of data
AssigneeMicron Technology, Inc.
InventorJoo S. Choi
Life of this patent
Estimating the term…
Abstract
A memory device includes a number of terminals for transferring input data and output data to and from a memory array. The memory device includes an auxiliary circuit for receiving input auxiliary information associated with the input data and for generating output auxiliary information associated with the output data. The input and output auxiliary information include inverting codes, parity codes, temperature information or time delay information. The input and output auxiliary information are transferred to and from the memory device on the same terminals that the input data and the output data are transferred.
Claims30
A device comprising:
- a plurality of data lines for transferring both data and auxiliary information, wherein at least one of the data lines is configured for serially transferring at least one bit of the data with at least one bit of the auxiliary information;
- a memory array for storing the data;
- an auxiliary circuit having auxiliary lines for carrying auxiliary information;
- and
- a transceiver circuit connected to the memory array and the data lines for transferring the data between the memory array and the data lines, the transceiver circuit also connects to the auxiliary circuit for transferring the auxiliary information between the auxiliary lines and the data lines.
2 more elements
A device comprising:
- a plurality of data lines for transferring both data and auxiliary information, wherein at least one of the data lines is configured for serially transferring at least one bit of the data with at least one bit of the auxiliary information;
- a memory array for storing data;
- an auxiliary circuit including a parity controller connected to the memory array for generating a plurality of parity codes for the data;
- and
- a transceiver circuit connected to the memory array and the data lines for transferring the data between the memory array and the data lines, the transceiver circuit also connects to the parity controller for transferring the parity codes between the parity controller and the data lines.
2 more elements
A device comprising:
- a plurality of data lines;
- a memory array for storing the data;
- an auxiliary circuit including a parity controller connected to the memory array for generating a plurality of parity codes for the data;
- and
- a transceiver circuit connected to the memory array and the data lines for transferring the data between the memory array and the data lines, the transceiver circuit also connects to the parity controller for transferring the parity codes between the parity controller and the data lines, wherein the auxiliary circuit further includes an inversion controller connected to the transceiver circuit and the memory array for conditionally inverting the data transferred between the transceiver circuit and the memory array, wherein the inversion controller includes a storage unit for storing inverting codes of the data, and wherein the transceiver circuit connects to the storage unit for transferring the inverting codes between the inversion controller and the data lines.
2 more elements
A device comprising:
- a plurality of data lines for transferring both data and auxiliary information, wherein at least one of the data lines is configured for serially transferring at least one bit of the data with at least one bit of the auxiliary information;
- a memory array for storing input data and output data;
- an input auxiliary circuit configured for receiving input auxiliary information of the input data and configured for performing a function on the input data;
- an output auxiliary circuit configured for generating output auxiliary information of the output data and configured for performing a function on the output data;
- and
- a transceiver circuit connected to the memory array and the data lines for transferring the input and output data between the memory array and the data lines, the transceiver circuit also connects to the input and output auxiliary circuits for transferring the input and output auxiliary information between the input and output auxiliary circuits and the data lines.
3 more elements
A device comprising:
- a plurality of data lines for transferring both data and auxiliary information;
- a memory array for storing the data;
- an auxiliary circuit having auxiliary lines for carrying auxiliary information, the auxiliary circuit including an inversion controller for conditionally inverting the data, wherein the inversion controller includes, a storage unit for storing inverting codes of the data;
- and
- a transceiver circuit connected to the memory array and the data lines for transferring the data between the memory array and the data lines, the transceiver circuit also connects to the auxiliary circuit for transferring the auxiliary information between the auxiliary lines and the data lines.
2 more elements
A device comprising:
- a plurality of data lines for transferring both data and auxiliary information;
- a memory array for storing data;
- an auxiliary circuit including a parity controller corrected to the memory array for generating a plurality of parity codes for the data, and inversion controller connected to the memory array for conditionally inverting the data, wherein the conversion controller includes a storage unit for storing inverting codes of the data;
- and
- a transceiver circuit connected to the memory array and the data lines for transferring the data between the memory array and the data lines, the transceiver circuit also connects to the parity controller for transferring the parity codes between the parity controller and the data lines.
2 more elements
A device comprising;
- a plurality of data lines for transferring both data and auxiliary information;
- a memory array for storing input data and output data;
- an input auxiliary circuit configured for receiving input auxiliary information of the input data and configured for performing a function on the input data;
- an output auxiliary circuit configured for generating output auxiliary information of the output data and configured for conditionally inverting the output data based on the output auxiliary information;
- and
- a transceiver circuit connected to the memory array and the data lines for transferring the input and output data between the memory array and the data lines, the transceiver circuit also connects to the input and output auxiliary circuits for transferring the input and output auxiliary information between the input and output auxiliary circuits and the data lines.
3 more elements
Dependencies are inferred from the claim text.