Thin film magnetic memory device having a magnetic tunnel junction
AssigneeRenesas Technology Corp.
InventorHideto Hidaka
Life of this patent
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Abstract
Bit lines and source lines are precharged to a power supply voltage before data read operation. In the data read operation, a corresponding bit line is coupled to a data bus as well as a corresponding source line is driven to a ground voltage only in the selected memory cell column. In the non-selected memory cell columns, the bit lines and the source lines are retained at the precharge voltage, i.e., the power supply voltage. No charging/discharging current is produced in the bit lines of the non-selected memory cell columns, that is, a charging/discharging current that does not directly contribute the data read operation is not produced, thereby allowing for reduction in power consumption in the data read operation.
Claims5
A memory device, comprising:
- a plurality of memory cells each including a storage portion having an electric resistance value varying according to storage data;
- a plurality of first bit lines each being connectable to one of said memory cells in a data read;
- a plurality of second bit lines each being connectable to one of said memory cells in said data read and provided to form a bit line pair with one of said first bit lines;
- a differential amplifier connected to the bit line pair corresponding to selected memory cell of said memory cells in said data read, wherein
- the first bit line and the second bit line forming said bit line pair are arranged to extend along opposite directions from each other.
Dependencies are inferred from the claim text.