Semiconductor device and test method thereof
AssigneeKabushiki Kaisha Toshiba
InventorsShinji Takeda, Yoshiharu Hirata, Naokazu Kuzuno
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AssigneeKabushiki Kaisha Toshiba
InventorsShinji Takeda, Yoshiharu Hirata, Naokazu Kuzuno
Estimating the term…
Data read out from each memory cell in a memory cell array is compared with an expected value by a comparator, and the quality of a memory cell is determined by performing program verify and erase verify. Based on the comparison result of the comparator, a detected defective cell is repaired by replacing it with a spare cell. Every time a defective cell is replaced with a spare cell, information on the defective cell is stored in a register, and whether a defective cell exists and whether the repair is possible are determined on the basis of the information. When the repair is possible, a control circuit is caused to execute control, and a detected defective cell is repaired by replacing it with a spare cell. When the repair is impossible, the defect repair stops.
A semiconductor device comprising:
A semiconductor device test method comprising:
Dependencies are inferred from the claim text.