Low supply voltage temperature compensated reference voltage generator and method

A reference voltage generator comprising:

• a bipolar transistor having a emitter, a base and a collector, the bipolar transistor having its base and collector coupled to each other and to a first voltage source;
• a first current source coupled between the emitter of the bipolar transistor and a second voltage source, the first current source causing a first current to flow between the emitter and collector of the bipolar transistor to cause a forward junction voltage to be generated at the emitter of the bipolar transistor;
• a resistor having first and second terminals, the first terminal of the resistor being coupled to a third voltage source;
• a second current source coupled between the second terminal of the resistor and a fourth voltage source, the second current source causing a second current to flow through the resistor to cause the thermal voltage to be generated at the second terminal of the resistor;
• a first averaging resistor coupled between the emitter of the bipolar transistor and an output node to couple the forward junction voltage to the output node through the first averaging resistor;
• and
• a second averaging resistor coupled between the second terminal of the resistor and the output node to couple the thermal voltage to the output node through the second averaging resistor, a reference voltage being generated at the output node.

A supply voltage circuit, comprising:

• a charge pump generating a supply voltage having a magnitude determined by a reference voltage applied to a reference voltage input;
• and
• a reference voltage generator having an output node coupled to the reference voltage input of the charge pump, the reference voltage generator, comprising:
• a diode device generating a forward junction voltage, the magnitude of the generated forward junction voltage having a first predetermined temperature sensitivity;
• a thermal voltage generator generating a thermal voltage, the magnitude of the generated thermal voltage having a second predetermined temperature sensitivity;
• and
• a signal combiner coupled to receive the forward junction voltage from the diode device and the thermal voltage from the thermal voltage generator, the signal combiner combining the forward junction voltage with the thermal voltage to provide a reference voltage at the output node in a manner that causes the second temperature sensitivity to substantially counteract the first temperature sensitivity so that the reference voltage is substantially insensitive to temperature, the signal combiner being operable to combine the forward junction voltage with the thermal voltage without generating any voltage having a magnitude that is substantially greater than either the forward junction voltage or the thermal voltage.

A supply voltage circuit, comprising:

• a charge pump generating a supply voltage having a magnitude determined by a reference voltage applied to a reference voltage input;
• and
• a reference voltage generator having an output node coupled to the reference voltage input of the charge pump, the reference voltage generator, comprising:
• a bipolar transistor having a emitter, a base and a collector, the bipolar transistor having its base and collector coupled to each other and to a first voltage source;
• a first current source coupled between the emitter of the bipolar transistor and a second voltage source, the first current source causing a first current to flow between the emitter and collector of the bipolar transistor to cause a forward junction voltage to be generated at the emitter of the bipolar transistor;
• a resistor having first and second terminals, the first terminal of the resistor being coupled to a third voltage source;
• a second current source coupled between the second terminal of the resistor and a fourth voltage source, the second current source causing a second current to flow through the resistor to cause the thermal voltage to be generated at the second terminal of the resistor;
• a first averaging resistor coupled between the emitter of the bipolar transistor and an output node to couple the forward junction voltage to the output node through the first averaging resistor;
• and
• a second averaging resistor coupled between the second terminal of the resistor and the output node to couple the thermal voltage to the output node through the second averaging resistor, a reference voltage being generated at the output node.

A memory device, comprising:

• a row address circuit operable to receive and decode row address signals applied to external address terminals of the memory device;
• a column address circuit operable to receive and decode column address signals applied to the external address terminals;
• a memory cell array operable to store data written to or read from the array at a location determined by the decoded row address signals and the decoded column address signals;
• a data path circuit operable to couple data signals corresponding to the data between the array and external data bus terminals;
• a command decoder operable to decode a plurality of command signals applied to respective external command terminals of the memory device, the command decoder being operable to generate control signals corresponding to the decoded command signals;
• a charge pump generating a supply voltage having a magnitude determined by a reference voltage applied to a reference voltage input;
• and
• a reference voltage generator having an output node coupled to the reference voltage input of the charge pump, the reference voltage generator, comprising:
• a diode device generating a forward junction voltage, the magnitude of the generated forward junction voltage having a first predetermined temperature sensitivity;
• a thermal voltage generator generating a thermal voltage, the magnitude of the generated thermal voltage having a second predetermined temperature sensitivity;
• and
• a signal combiner coupled to receive the forward junction voltage from the diode device and the thermal voltage from the thermal voltage generator, the signal combiner combining the forward junction voltage with the thermal voltage to provide a reference voltage at the output node in a manner that causes the second temperature sensitivity to substantially counteract the first temperature sensitivity so that the reference voltage is substantially insensitive to temperature, the signal combiner being operable to combine the forward junction voltage with the thermal voltage without generating any voltage having a magnitude that is substantially greater than either the forward junction voltage or the thermal voltage.

A processor-based system, comprising:

• a processor having a processor bus;
• an input device coupled to the processor through the processor bus to allow data to be entered into the computer system;
• an output device coupled to the processor through the processor bus to allow data to be output from the computer system;
• a data storage device coupled to the processor through the processor bus to allow data to be read from a mass storage device;
• a memory controller coupled to the processor through the processor bus;
• and
• a memory device coupled to the memory controller, the memory device comprising:
• a row address circuit operable to receive and decode row address signals applied to external address terminals of the memory device;
• a column address circuit operable to receive and decode column address signals applied to the external address terminals;
• a memory cell array operable to store data written to or read from the array at a location determined by the decoded row address signals and the decoded column address signals;
• a data path circuit operable to couple data signals corresponding to the data between the array and external data bus terminals;
• a command decoder operable to decode a plurality of command signals applied to respective external command terminals of the memory device, the command decoder being operable to generate control signals corresponding to the decoded command signals;
• a charge pump generating a supply voltage having a magnitude determined by a reference voltage applied to a reference voltage input;
• and
• a reference voltage generator having an output node coupled to the reference voltage input of the charge pump, the reference voltage generator, comprising:
• a diode device generating a forward junction voltage, the magnitude of the generated forward junction voltage having a first predetermined temperature sensitivity;
• a thermal voltage generator generating a thermal voltage, the magnitude of the generated thermal voltage having a second predetermined temperature sensitivity;
• and
• a signal combiner coupled to receive the forward junction voltage from the diode device and the thermal voltage from the thermal voltage generator, the signal combiner combining the forward junction voltage with the thermal voltage to provide a reference voltage at the output node in a manner that causes the second temperature sensitivity to substantially counteract the first temperature sensitivity so that the reference voltage is substantially insensitive to temperature, the signal combiner being operable to combine the forward junction voltage with the thermal voltage without generating any voltage having a magnitude that is substantially greater than either the forward junction voltage or the thermal voltage.