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US 7,116,539 B2Granted
Fast CMOS matched impedance DC write current driver for preamplifiers
AssigneeSTMicroelectronics S.r.l.
InventorsVineet Twari, Roberto Alini
Life of this patent
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Abstract
A driver circuit includes a CMOS stage and switch functionalities for performing certain tasks. One task is to selectively block exposure of the CMOS stage to reference voltage(s). Another task is to selectively protect the CMOS stage during transient operation. Yet another task is to block leakage current from flowing from the CMOS stage to ground.
Claims32
A driver circuit, comprising:
- a CMOS stage having an input and an output, and a first path terminal and a second path terminal;
- a first switch coupled between a positive reference and the first path terminal, the first switch operating responsive to a first control signal to selectively block exposure of the CMOS stage to the positive reference;
- a second switch coupled between a negative reference and the second path terminal, the second switch operating responsive to a second control signal to selectively block exposure of the CMOS stage to the negative reference;
- a third switch coupled between the first path terminal and ground and operating responsive to the first control signal to selectively protect the CMOS stage during transient operation;
- a fourth switch coupled between the second path terminal and ground and operating responsive to the second control signal to selectively protect the CMOS stage during transient operation;
- a first current source coupled between the positive reference and the CMOS stage output;
- and
- a second current source coupled between the negative reference and the CMOS stage output.
5 more elements
A driver circuit, comprising
- a CMOS stage having an input and an output, and a first path terminal and a second path terminal;
- a first switch coupled between a positive reference and the first path terminal, the first switch operating responsive to a first control signal to selectively block exposure of the CMOS stage to the positive reference;
- a second switch coupled between a negative reference and the second path terminal, the second switch operating responsive to a second control signal to selectively block exposure of the CMOS stage to the negative reference;
- a third switch series coupled with the first switch between the positive reference and the first path terminal, the third switch blocking leakage current from the first path terminal to ground;
- a fourth switch series coupled with the second switch between the negative reference and the second path terminal, the third switch blocking leakage current from the second path terminal to ground;
- a first current source coupled between the positive reference and the CMOS stage output;
- and
- a second current source coupled between the negative reference and the CMOS stage output.
5 more elements
A driver circuit, comprising:
- a CMOS stage having an input and an output, and a first path terminal and a second path terminal;
- a first p-channel transistor whose source is coupled to a positive reference, whose drain is coupled to the first path terminal and whose gate is coupled to receive a first control signal, the first p-channel transistor operating responsive thereto to selectively block exposure of the CMOS stage to the positive reference;
- a first n-channel transistor whose source is coupled to a negative reference, whose drain is coupled to the second path terminal and whose gate is coupled to receive a second control signal, the first n-channel transistor operating responsive thereto to selectively block exposure of the CMOS stage to the negative reference;
- a second p-channel transistor whose source is coupled to ground, whose drain is coupled to the second path terminal and whose gate is coupled to receive the second control signal, the second p-channel transistor operating responsive thereto to selectively protect the CMOS stage during transient operation;
- a second n-channel transistor whose source is coupled to ground, whose drain is coupled to the first path terminal and whose gate is coupled to receive the first control signal, the second n-channel transistor operating responsive thereto to selectively protect the CMOS stage during transient operation;
- a first current source coupled between the positive reference and the CMOS stage output;
- and
- a second current source coupled between the negative reference and the CMOS stage output.
5 more elements
A driver circuit, comprising:
- a CMOS stage having an input and an output, and a first path terminal and a second path terminal;
- a first cascode circuit comprising a pair of p-channel transistors, the cascode circuit having a source coupled to a positive reference, a drain coupled to the first path terminal and a first interconnection node, wherein a first gate of one p-channel transistor in the first cascode circuit is coupled to receive a first control signal and a second gate of another p-channel transistor in the first cascode circuit is coupled to ground, the first cascode circuit operating responsive to the first control signal to selectively block exposure of the CMOS stage to the positive reference and further operating to block leakage current from the first path terminal;
- a second cascode circuit comprising a pair of n-channel transistors, the cascode circuit having a source coupled to a negative reference, a drain coupled to the second path terminal and a second interconnection node, wherein a first gate of one n-channel transistor in the second cascode circuit is coupled to receive a second control signal and a second gate of another n-channel transistor in the second cascode circuit is coupled to ground, the second cascode circuit operating responsive to the second control signal to selectively block exposure of the CMOS stage to the negative reference and further operating to block leakage current from the second path terminal;
- a first current source coupled between the positive reference and the CMOS stage output;
- and
- a second current source coupled between the negative reference and the CMOS stage output.
3 more elements
Dependencies are inferred from the claim text.