Array substrate for in-plane switching mode liquid crystal display device and method for fabricating the same

A method for fabricating an array substrate for a liquid crystal display device, comprising:

• forming a gate line extending along a first direction on a substrate;
• forming a data line extending along a second direction on the substrate, thereby defining a pixel region by a crossing of the gate and data lines;
• forming a common line extending along the first direction and spaced apart from the gate line;
• forming a common electrode having a plurality of first portions extended along the second direction from the common line to the pixel region and a second portion extended in the first direction and connected to the plurality of first portions, wherein one of the first portions of the common electrode adjacent to the data line includes first and second extensions overlapping portions of the data line;
• forming a thin film transistor on the substrate at a crossing portion of the gate and data lines, wherein the thin film transistor includes source and drain electrodes;
• forming a pixel electrode extended from the drain electrode to the pixel region;
• and
• forming an auxiliary electrode that extends along the second drain direction and connects to the one of the first portions of the common electrode adjacent to the data line.

An array substrate device for a liquid crystal display device, comprising:

• a substrate;
• a gate line extending along a first direction on the substrate;
• a data line extending along a second direction substantially perpendicular to the first direction on the substrate;
• a pixel region defined by a crossing of the gate and data lines;
• a common line extending along the first direction and spaced apart from the gate line;
• a common electrode having a plurality of first portions extended along the second direction from the common line to the pixel region;
• a thin film transistor on the substrate at a crossing portion of the gate and data lines, the thin film transistor including source and drain electrodes;
• a pixel electrode on the substrate extended from the drain electrode to the pixel region;
• and
• an auxiliary electrode extended from the common line along the second direction to a space between the data line and one of the first portions of the common electrode adjacent to the data line, the auxiliary electrode having first and second extensions crossing the data line.

A method for fabricating an array substrate for a liquid crystal display device, comprising:

• forming a gate line extending along a first direction on a substrate;
• forming a data line extending along a second direction on the substrate, thereby defining a pixel region by a crossing of the gate and data lines;
• forming a common line extending along the first direction and spaced apart from the gate line;
• forming a common electrode having a plurality of portions extended from the common line to the pixel region;
• forming a thin film transistor at a crossing portion of the gate and data lines;
• forming a pixel electrode extended from the drain electrode to the pixel region;
• and
• forming an auxiliary electrode extended from the common line along the second direction to a space between the data line and one of the portions of the common electrode adjacent to the data line, the auxiliary electrode having first and second extensions crossing the data line.

An array substrate device for a liquid crystal display

• device, comprising:
• a substrate;
• a gate line extending along a first direction on the substrate;
• a data line extending along a second direction substantially perpendicular to the first direction on the substrate;
• a pixel region defined by a crossing of the gate and data lines;
• a common line extending along the first direction and spaced apart from the gate line;
• a pixel electrode connected to the drain electrode and extending along the second direction;
• a common electrode connected to the common line and including first and second portions extending along the second direction, wherein the first and second portions are disposed between the data line and the pixel electrode and at different layers from each other, wherein the first portion is disposed between the second portion and the data line and includes first and second extensions overlapping portions of the data line;
• and
• a thin film transistor on the substrate at a crossing portion of the gate and data lines, the, thin film transistor including source and drain electrodes.