US 7,116,332 B2 · API communications for vertex and pixel shaders

Abstract

A three-dimensional API for communicating with hardware implementations of vertex shaders and pixel shaders having local registers. With respect to vertex shaders, API communications are provided that may make use of an on-chip register index and API communications are also provided for a specialized function, implemented on-chip at a register level, that outputs the fractional portion(s) of input(s). With respect to pixel shaders, API communications are provided for a specialized function, implemented on-chip at a register level, that performs a linear interpolation function and API communications are provided for specialized modifiers, also implemented on-chip at a register level, that perform modification functions including negating, complementing, remapping, stick biasing, scaling and saturating. Advantageously, these API communications expose these very useful on-chip graphical algorithmic elements to a developer while hiding the details of the operation of the vertex shader and pixel shader chips from the developer.

Claims20

Dependent claims

A computer-readable medium having computer-executable instructions communicating between a 3-D graphics API of a host computing system having a main memory stack and a hardware procedural shader having on-chip register storage, wherein the computer-executable instructions perform:

receiving at least one instruction having at least one graphics data argument by the 3-D API;
formatting said at least one instruction for use with the hardware procedural shader;
providing said at least one formatted instruction to said hardware procedural shader;
processing said at least one graphics data argument, pursuant to said at least one formatted instruction, by the hardware procedural shader without accessing the main memory stack of the host computing system;
outputting the result of said processed at least one graphics data argument from said hardware procedural shader in accordance with said at least one formatted instruction;
communicating between a 3-D graphics API of a host computing system and a hardware vertex shader with on-chip register storage, and said at least one instruction is an instruction with at least one floating point number argument and said outputting includes outputting from the vertex shader the fractional portion of said at least one floating point number;
and
wherein said outputting includes outputting four fractional portions of corresponding four floating point number arguments.

5 more elements

A system for communicating between a 3-D graphics API of a host computing system having a main memory stack and a hardware procedural shader having on-chip register storage, comprising:

a 3-D graphics API, wherein at least one instruction having at least one graphics data argument is received by the 3-D API;
a host computing system having a main memory stack;
a hardware procedural shader having on-chip register storage, wherein said at least one instruction is formatted and provided to the hardware procedural shader, and wherein said at least one graphics data argument is processed pursuant to said at least one formatted instruction by the hardware procedural shader without accessing the main memory stack of the host computing system;
an output for providing the result of said processed at least one graphics data argument from said hardware procedural shader in accordance with said at least one formatted instruction, wherein said outputting includes outputting four fractional portions of corresponding four floating point number arguments;
and
a hardware vertex shader with on-chip register storage, wherein the 3-D graphics API of a host computing system and a hardware vertex shader communicates with the hardware vertex shader, and wherein said at least one instruction is an instruction with at least one floating point number argument and said outputting includes outputting from the vertex shader the fractional portion of said at least one floating point number.

3 more elements

Dependencies are inferred from the claim text.

API communications for vertex and pixel shaders

Life of this patent

API communications for vertex and pixel shaders

Life of this patent

Abstract

Claims20