Radio frequency digital-to-analog converter
AssigneeSTMicroelectronics S.r.l.
InventorsSteven R. Norsworthy, Andrew Tham, Jason Rupert Redgrave, Aubrey Arthur Grey
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Abstract
A radio frequency digital-to-analog converter with a programmable current output. In exemplary aspects of the invention, improved apparatus and methods for providing (i) current mirror matching, (ii) enhanced current pulse rising edge performance, (ii) reduced base voltage swing, and (iv) compensated high voltage swing, are provided. The foregoing apparatus and methods can be applied to any RF signal application (wireless or otherwise), including for example wireless cellular handsets.
Claims25
A digital-to-analog conversion apparatus, comprising:
- an output transistor having a base node;
- a control signal node;
- a first switch adapted to switch the base node of said output transistor to alternate ones of at least first and second voltages;
- a second switch electrically coupled to said first switch and adapted to correct for a voltage drop associated with said first switch;
- at least one capacitor electrically disposed between said control signal node of said circuit and the base node of said output transistor;
- and
- a second transistor adapted to generate said second voltage;
- wherein said first and second voltages are selected in order to reduce a voltage swing of said base node during switching transients.
A digital-to-analog conversion apparatus, comprising:
- an output transistor;
- a first switch adapted to switch a base of said output transistor to alternate ones of a plurality of voltages;
- and
- a second switch electrically coupled to said first switch and adapted to correct for a voltage drop associated with said first switch.
A digital-to-analog conversion apparatus comprising an output transistor device having a base node, said apparatus being adapted to reduce a voltage swing associated with said base node during switching, said apparatus comprising:
- a first switch adapted to switch the base node of said output transistor device to alternate ones of first and second voltages;
- and
- a second transistor device adapted to generate said second voltage.
A high-speed, low-power digital-to-analog conversion (DAC) apparatus comprising:
- an output transistor device having a base node;
- a first switch adapted to switch the base node of said output transistor device to alternate ones of first and second voltages;
- and
- a second transistor device adapted to generate said second voltage;
- wherein said first and second voltages are selected in order to reduce a voltage swing of said base node during switching transients, said reduction of voltage swing producing both high switching speeds and reduced power dissipation within said apparatus.
A method for reducing base voltage swing in a circuit, comprising:
- providing an output transistor device;
- providing a circuit device having substantially the same size as said output transistor device;
- using the circuit device to generate a bias rail voltage;
- and
- switching a base node of the output transistor device between the bias rail voltage and a second voltage;
- wherein said bias rail voltage and said second voltage are selected so as to minimize voltage swing within said output transistor device.
A radio frequency transmitter comprising:
- a baseband processor capable of processing digital data and producing at least one output comprising processed digital data;
- a digital-to analog converter adapted to receive said processed digital data and convert the processed digital data to signals in an analog domain;
- and
- an antenna adapted to transmit at least a portion of said analog domain signals;
- wherein said digital-to-analog converter comprises:
- at least one output transistor device having a base node;
- a first switch adapted to switch the base node of said output transistor device to alternate ones of first and second voltages;
- and
- a second transistor device adapted to generate said second voltage;
- wherein said digital-to-analog converter and said first and second voltages are configured to reduce a voltage swing associated with said base node during switching.
Dependencies are inferred from the claim text.