Programmable serializing data path
AssigneeXilinx, Inc.
InventorsEric D. Groen, Charles W. Boecker
Life of this patent
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Abstract
A programmable serial data path includes a programmable timing circuit and a parallel to serial module. The programmable timing circuit is operably coupled to generate a first plurality of timing signals when width of parallel input data is of a first multiple and to generate a second plurality of timing signals when the width of the parallel input data is of a second multiple. The parallel to serial module is operably coupled to convert the parallel input data into serial output data based on the first or second plurality of timing signals.
Claims18
A method for programmable serializing of parallel data, the method comprises:
- receiving the parallel data;
- obtaining a data width of the parallel data, wherein the data width is of a first multiple or a second multiple;
- obtaining a desired serial data output rate;
- generating a multiple state control sequence based on the data width of the parallel data and the desired serial data output rate;
- and
- converting the parallel data into serial data in accordance with the multiple state control sequence.
A programmable serializing data path comprises:
- a processing module;
- and
- a memory operably coupled to the processing module, wherein the memory stores operational instructions that cause the processing module to:
- receive the parallel data;
- obtain a data width of the parallel data, wherein the data width is of a first multiple or a second multiple;
- obtain a desired serial data output rate;
- generate a multiple state control sequence based on the data width of the parallel data and the desired serial data output rate;
- and
- convert the parallel data into serial data in accordance with the multiple state control sequence.
A programmable logic device comprises:
- a transmit physical media attachment module operably coupled to convert parallel input data into serial output data;
- a receive physical media attachment module operably coupled to convert receive serial data into receive parallel data;
- a transmit physical coding sublayer module operably coupled to convert transmit data words into the parallel input data;
- a receive physical coding sublayer module operably coupled to convert the receive parallel data into receive data words;
- and
- programmable logic fabric operably coupled to provide the transmit data words to the transmit physical coding sublayer module to receive the receive data words from the receive physical coding sublayer module, wherein the transmit physical media attachment module includes:
- a programmable serializing data path operably coupled to convert the parallel input data into the serial output data;
- and
- a line driver operably coupled to drive the serial output data onto a transmission line coupled to the programmable logic device, wherein the programmable serializing data path includes:
- a processing module;
- and
- a memory operably coupled to the processing module, wherein the memory stores operational instructions that cause the processing module to:
- receive the parallel input data;
- obtain a data width of the parallel input data, wherein the data width is of a first multiple or a second multiple;
- obtain a desired serial data output rate;
- generate a multiple state control sequence based on the data width of the parallel input data and the desired serial data output rate;
- and
- convert the parallel input data into serial data in accordance with the multiple state control sequence.
Dependencies are inferred from the claim text.