Base current compensation circuit for a bipolar junction transistor

A method for compensating a base current of a BJT, comprising:

• providing an input current on a first segment of a serial current path, wherein the current path further comprises a second segment and a node disposed between the first and the second segments;
• producing a replicated base current;
• and
• causing a combination of the replicated base current and the input current to flow through the second segment of the current path, wherein an output voltage at the node is compensated by the base current influence on the output voltage to allow peration of the BJT in a BJT breakdown region.

An apparatus for producing a compensating base current of an operational BJT operating in an operational circuit to produce an output voltage at an output node and having an operating base current, the apparatus comprising:

• a compensating BJT having substantially similar operating parameters to the operational BJT;
• a first plurality of circuit elements replicating operating conditions of the operational circuit;
• and
• a second plurality of circuit elements operational with the first plurality of circuit elements and the compensating BJT for producing the compensating base current, wherein the compensating current is supplied to the output node of the operational circuit to compensate the operating base current to allow operation of the BJT in a BJT breakdown region.

A BJT base current compensation circuit, comprising:

• a BJT having base, collector and emitter regions;
• a first and a second series current path comprising a node therebetween, wherein the base region is connected to the node such that a base current flows through the node;
• a third and a fourth series current path comprising an output node therebetween;
• an input current
• flowing on the second and the fourth current paths;
• wherein a combination of the input current and the base current flows on the first current path and is mirrored to the third current path;
• and
• wherein the current at the output node represents the base current and wherein the current at the output node is supplied to an output node of an operational circuit comprising an operating BJT for compensating a negative base current in the operational circuit to allow operation of the BJT in a BJT breakdown region.

A BJT base current compensation circuit for producing a compensating base current comprising:

• a BJT having base, collector and emitter regions;
• a first node connected to the base region, wherein base current flows through the first node;
• an input current flowing from the first node;
• a first MOSFET disposed such that a first current comprising a combination of the input current and the base current flows through a source-drain current path of the first MOSFET;
• a first current mirror with respect to the first MOSFET;
• and
• a second node connected to the first current mirror, wherein the first current flows through the second node from the first current mirror, and wherein the compensating base current is produced at the second node;
• a current source producing the input current;
• a second MOSFET connected to the current source, wherein the input current flows through a source-drain path of the second MOSFET;
• and
• a second current mirror with respect to the second MOSFET, wherein the second current mirror is connected to the second node to cause the input current to exit the second node along a second path.

A BJT base current compensation circuit, comprising:

• a BJT having a base, a collector and an emitter region, wherein a positive base current Tb is assumed flowing into the base region;
• a first and a second reference voltage;
• a first MOSFET having a drain-source path connected between the first reference voltage and the collector region and a gate connected to the first reference voltage;
• a first node connected to the base region;
• a second node;
• a resistor connected between the second node and the first reference voltage;
• a first current source for producing a current Ipd from the second node to the second reference voltage;
• a second current source for producing a current Ie from the emitter region to the second reference voltage;
• a second MOSFET having a gate and a source-drain path, wherein the gate is connected to second node;
• a first element serially connected to the first reference voltage and to the first node through the drain-source path of the second MOSFET;
• a first current mirror operating in conjunction with the first element and connected between an output terminal and the first reference voltage;
• a second element;
• a third current source for producing a current Tin into the second element;
• a second current mirror operating in conjunction with the second element, wherein the second current mirror is disposed to produce the current Tin between the first node and the second reference voltage and between the output terminal and the second reference voltage;
• wherein the current flowing through the first element and the source-drain path of the second MOSFET is Iin +Ib;
• wherein the current flowing through the first current mirror into the output terminal is Iin +Ib;
• wherein the current flowing from the output terminal is substantially Ib.