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US 7,116,163 B2Granted
Buffer circuit
AssigneeBroadcom Corporation
InventorMichael S. Kappes
Life of this patent
Estimating the term…
Abstract
A buffer circuit comprised of two matched stages is provided. The first stage develops a replica voltage that is used in the second stage as the input to a wide-band amplifier. The combination of the two feedback loops in the circuit result in improved linearity. The first amplifier dominates for moderate frequencies while the second amplifier takes over for high frequencies.
Claims18
A buffer circuit, comprising:
- a first stage comprising a first amplifier and at least one device;
- a second stage comprising a second amplifier and at least two devices;
- wherein said second stage further comprises an open loop formed between at least one of said at least two devices and the second amplifier,
- wherein a negative input of the first amplifier is essentially directly connected to a negative input of the second amplifier;
- wherein control terminals of said at least one device and said at least one of said at least two devices are connected.
2 more elements
A buffer circuit, comprising:
- a first stage comprising a first amplifier and at least one device;
- a second stage comprising a second amplifier and at least two devices;
- wherein said second stage further comprises an open loop formed between at least one of said at least two devices and the second amplifier,
- wherein a negative input of the first amplifier is essentially directly connected to a negative input of the second amplifier,
- wherein at least one of said devices comprises a transistor.
2 more elements
A buffer circuit, comprising:
- first amplifying means for receiving an input signal;
- first transistor means for receiving an input from a first amplifier and sending an output to the first amplifier;
- second transistor means for receiving an input from the first amplifier;
- third transistor means for receiving an input from a second amplifier;
- and
- outputting means for receiving an input from the second transistor means and an input from the second amplifier and outputting an output signal, wherein said output signal has low impedance.
3 more elements
A method of operating a buffer circuit, comprising the steps of:
- receiving an input signal at a first stage, said first stage comprising a first amplifier and a first device;
- sending a signal from the first amplifier to the first device;
- feeding back a signal from said first device to said first amplifier;
- sending a signal from said first stage to a second stage, said second stage comprising an open loop;
- outputting, at the second stage, an output signal with low impedance;
- wherein a negative input of the first stage is essentially directly connected to a negative input of the second stage.
3 more elements
Dependencies are inferred from the claim text.