Constant-peak-current minimum-off-time pulse frequency modulator for switching regulators
AssigneeMonolithic Power Systems, Inc.
InventorsJames H. Nguyen, Thomas T. Chiang, Christopher T. Falvey
Life of this patent
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Abstract
Methods and apparatus are disclosed for controlling switching regulators to automatically switch from a traditional pulse-width modulation (PWM) mode, when the load current is higher than a predetermined value, to a pulse-frequency modulation (PFM) mode, when the load current drops to a point lower than the predetermine value. Switching modes increases the efficiency of the regulator when the load current is low without provoking a large output voltage transient. In some embodiments, a single switching cycle regulates the output in the PFM mode, which reduces the switching losses and enhances the efficiency of the regulator.
Claims16
A switching regulator for controlling an output voltage configured to feed a load, wherein the switching regulator operates in pulse-width modulation (PWM) mode when the load current is higher than a predetermined value and operates in pulse-frequency modulation (PFM) mode when the load current is lower than the predetermined value, the switching regulator comprising:
- an input voltage port for supplying input voltage VIN to the switching regulator;
- an output voltage port for providing a regulated output voltage VOUT to the load;
- a switch SW, connected to the output voltage port for turning the output voltage on and off, wherein SW is partly controlled by a feedback signal representing VOUT;
- a feedback port FB to which a predetermined portion of the output voltage VOUT(VFB) is connected;
- an inductor L, connected between the input voltage port and the output voltage port;
- a clock pulse generator;
- an error amplifier;
- a PWM comparator;
- a feedback comparator;
- a light-load comparator;
- and
- a configuration wherein:
- in PWM mode, at the beginning of each clock cycle switch SW is turned on to increase a current in the inductor L (IL) which is converted to a voltage VIPK and is compared to a control voltage VCONTRL by the PWM comparator to turn off switch SW when VIPK=VCONTROL, wherein VCONTRL is generated by comparing VFB to an internal reference voltage VREF using the error amplifier;
- and
- in PFM mode, the feedback comparator compares VOUT, using VFB, to VREF and if VOUT<VREF, SW is turned on forcing IL to rise, where IL is converted to the voltage VIPK and is compared to a first reference voltage VIMIN by the light-load comparator and if VIPK=VIMIN SW is turned off forcing IL to charge up the output voltage VOUT and wherein VIMIN is a predetermined voltage, and wherein the switching regulator keeps idling until VFB drops to VREF.
An apparatus for regulating an output voltage VOUT, wherein the apparatus operates in pulse-width modulation (PWM) mode when a load current is higher than a predetermined value and in pulse-frequency modulation (PFM) mode when the load current is lower than the predetermined value, the apparatus comprising:
- means for switching VOUT “on” or “off”, wherein the switching means is partly controlled by a feedback signal representing VOUT;
- means for feeding back a portion of the output voltage VOUT(VFB);
- an inductor L, connected between an input-voltage port and an output-voltage port;
- means for generating clock pulses;
- means for amplifying voltages;
- means for converting current to voltage;
- means for comparing voltages;
- and
- a configuration wherein:
- in PWM mode, at the beginning of each clock cycle the switching means is turned on to increase a current in the inductor L (IL) which is amplified by the amplifying means, converted to a voltage VIPK by the current to voltage converting means, and is compared to a control voltage VCONTRL by the voltage comparing means to turn off the switching means once VIPK=VCONTROL, wherein VCONTRL is generated by comparing VFB to an internal reference voltage VREF;
- and
- in PFM mode, using VFB, VOUT is compared to VREF and if VOUT<VREF, the switching means is turned on forcing IL to rise where IL is amplified, converted to the voltage VIPK, and is compared to a first reference voltage VIMIN and if VIPK=VIMIN, the switching means is turned off forcing IL to charge up the output voltage VOUT and wherein VIMIN is a predetermined voltage.
A switching regulator method for controlling an output voltage VOUT, wherein VOUT is regulated by pulse-width modulation (PWM) when a load current is higher than a predetermined value and by pulse-frequency modulation (PFM) when the load current is lower than the predetermined value, the method comprising:
- providing an input-voltage VIN as an energy source to be regulated;
- regulating VOUT by switching VOUT on and off, using a switch SW;
- feeding back a predetermined portion of VOUT(VFB) to at least partly control switch SW;
- connecting an inductor L or an equivalent circuit element between input and output;
- if the load current is less than a predetermined value:
- turning on switch SW at the beginning of each clock cycle to increase a current in the inductor L (IL);
- converting IL to a voltage VIPK;
- generating a control voltage VCONTRL by comparing VFB to an internal reference voltage VREF;
- comparing VIPK to the control voltage VCONTRL;
- and
- turning off switch SW once VIPK=VCONTROL;
- and
- if the load current is more than a predetermined value:
- comparing VOUT to VREF, using VFB;
- and turning on SW to force IL to rise if VOUT<VREF;
- converting IL to the voltage VIPK;
- and
- comparing VIPK to the first reference voltage VIMIN and turn off SW to force IL to charge up the output voltage VOUT if VIPK=VIMIN, and wherein the switching regulator keeps idling until VFB drops to VREF and wherein VIMIN is a predetermined voltage.
Dependencies are inferred from the claim text.