Flexible ball grid array chip scale packages

A semiconductor die assembly comprising:

• a first semiconductor die having an active surface, an opposing back side, a side extending transversely therebetween and a plurality of bond pads over the active surface in a first arrangement;
• a second semiconductor die having an active surface, an opposing back side, a side extending transversely therebetween and a plurality of bond pads over the active surface thereof in a second arrangement;
• and
• a flexible dielectric interposer substrate having first and second opposing sides and first and second adjacent portions laterally separated by a first spacer portion and including:
• a first plurality of electrical contacts on the first side of the first portion connected to substantially all of the bond pads of the plurality of the first semiconductor die;
• a second plurality of electrical contacts on the second side of the first portion connected to substantially all of the bond pads of the plurality of the second semiconductor die;
• and
• a third plurality of electrical contacts on at least one of the first and second sides of the second portion and in communication through conductive traces with the first and second pluralities of electrical contacts, the third plurality of contacts being in a third arrangement differing from the first and second arrangements;
• wherein substantially all of the first portion of the interposer substrate extends and is secured between the first and second semiconductor dice, substantially all of the second portion is secured over the back side of one of the first and second semiconductor dice with the electrical contacts of the third plurality accessible and the first spacer portion extends over the side of the one of the first and second semiconductor dice to which the second portion is secured.

An interposer substrate for use with at least one semiconductor die having an active surface and a back side, the interposer substrate comprising:

• a flexible dielectric substrate having a first portion sized and configured to correspond to an active surface of a first selected semiconductor die and an adjacent second portion laterally separated by a spacer portion and sized and configured to correspond to an active surface of a second selected semiconductor die;
• a first plurality of electrical contacts on a first side of the first portion arranged to mate with substantially of the bond pads of the first selected semiconductor die and connected to a second plurality of electrical contacts on a side of a second portion of the interposer substrate through conductive traces, the second plurality of electrical contacts being in a different arrangement than the first plurality of electrical contacts;
• and
• a third plurality of electrical contacts on a second side of the first portion, arranged to mate with substantially all of the bond pads of the second selected semiconductor die and electrically connected through conductive traces to electrical contacts of the second plurality.

An electronic assembly, comprising:

• a semiconductor die assembly comprising:
• first and second semiconductor dice having mutually facing active surfaces;
• a flexible dielectric interposer substrate having first and second opposing sides and first and second adjacent portions laterally separated by a spacer portion, substantially all of the the first portion being disposed between the first and second semiconductor dice and substantially all of the second portion being secured over a back side of one of the first and second semiconductor dice with the spacer portion extending over a side of the semiconductor die over which the second portion is secured, the interposer substrate further including conductive traces respectively electrically connected to substantially all of the bong pads of the first and second semiconductor dice on opposing sides of the first portion and extending between the first portion and the second portion to an array of discrete conductive elements projecting from the second portion on the back side of the one of the first and second semiconductor dice to which the second portion is secured;
• and
• a higher level packaging structure connected to the semiconductor die assembly through the discrete conductive elements.