Method of forming metal/high-k gate stacks with high mobility

A semiconductor device comprising:

• a semiconductor substrate;
• a gate stack structure comprising a high-k gate dielectric and an underlaying interfacial layer comprising at least atoms of Si and O and having a dielectric constant greater than SiO2 located on a surface of said semiconductor substrate;
• and
• a gate conductor located atop the gate stack structure, wherein said gate stack structure has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.

A gate stack structure comprising, from bottom to top:

• an interfacial layer comprising atoms of at least Si and O and having a dielectric constant greater than SiO2;
• an overlying high-k gate dielectric, wherein said gate stack structure has an interface state density, as measured by charge pumping, of about 8×1012 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater, and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater;
• and
• a metal-containing gate electrode.