Micromechanical strained semiconductor by wafer bonding

A method for forming strained semiconductor structure, comprising:

• forming a number of recesses in a surface of a first semiconductor wafer such that the surface of the first semiconductor wafer has a number of raised areas and a number of recessed areas;
• bonding a surface of a second semiconductor wafer to the raised areas of the first semiconductor wafer in an environment having a first pressure;
• and
• bonding the surface of the second semiconductor wafer to the recessed areas of the first semiconductor wafer in an environment having a second pressure, the second pressure being greater than the first pressure to influence the second semiconductor wafer into contact with the first semiconductor wafer in the recesses in the surface of the first semiconductor wafer,
• wherein forming a number of recesses in a surface of a first semiconductor wafer includes forming the number of recesses with desired dimensions such that, upon bonding the surface of the second semiconductor wafer to the recessed areas of the first semiconductor wafer in an environment having a second pressure, the second semiconductor wafer has a strain greater than 0.5%.

A method for forming strained silicon structure, comprising:

• forming a number of recesses in a surface of a silicon substrate such that the surface of the substrate has a number of raised areas and a number of recessed areas, including:
• performing a Local Oxidation of Silicon (LOCOS) process to form a number of oxide regions in the substrate;
• and
• removing the oxide regions from the substrate;
• bonding a surface of a semiconductor membrane to the raised areas of the substrate in an environment having a first pressure;
• and
• bonding the surface of the membrane to the recessed areas of the substrate in an environment having a second pressure, the second pressure being greater than the first pressure to influence the membrane into contact with the substrate in the recesses in the substrate.

A method for forming strained semiconductor structure, comprising:

• forming a number of recesses in a surface of a first semiconductor wafer such that the surface of the first semiconductor wafer has a number of raised areas and a number of recessed areas;
• bonding a surface of a second semiconductor wafer to the raised areas of the first semiconductor wafer in an environment having a first pressure, including:
• forming the second semiconductor wafer in a surface layer of a sacrificial semiconductor wafer;
• bonding the surface layer of the sacrificial semiconductor wafer to the raised areas of the first semiconductor wafer;
• and
• removing a remaining portion of a sacrificial semiconductor wafer from the second semiconductor wafer such that the second semiconductor wafer remains bonded to the first semiconductor wafer;
• and
• bonding the surface of the second semiconductor wafer to the recessed areas of the first semiconductor wafer in an environment having a second pressure, the second pressure being greater than the first pressure to influence the second semiconductor wafer into contact with the first semiconductor wafer in the recesses in the surface of the first semiconductor wafer.

A method for forming strained semiconductor structure, comprising:

• forming a number of recesses in a surface of a first semiconductor wafer such that the surface of the first semiconductor wafer has a number of raised areas and a number of recessed areas;
• bonding a surface of a second semiconductor wafer to the raised areas of the first semiconductor wafer in a vacuum;
• and
• bonding the surface of the second semiconductor wafer to the recessed areas of the first semiconductor wafer at atmospheric pressure to strain the second semiconductor wafer into the recesses in the surface of the first semiconductor wafer.

A method for forming strained semiconductor structure, comprising:

• forming a number of recesses in a surface of a first semiconductor wafer such that the surface of the first semiconductor wafer has a number of raised areas and a number of recessed areas;
• bonding a surface of a second semiconductor wafer to the raised areas of the first semiconductor wafer in an environment having a first pressure, the second semiconductor wafer having a thickness of approximately 1000 Å or less;
• and
• bonding the surface of the second semiconductor wafer to the recessed areas of the first semiconductor wafer in an environment having a second pressure, the second pressure being greater than the first pressure to strain the second semiconductor wafer into the recesses in the surface of the first semiconductor wafer.

A method for forming a strained semiconductor structure, comprising:

• forming a number of recesses in a surface of a first semiconductor wafer such that the surface of the first semiconductor wafer has a number of raised areas and a number of recessed areas;
• defining a second semiconductor wafer in a surface layer of a sacrificial crystalline semiconductor wafer;
• bonding the surface layer of the sacrificial semiconductor wafer to the raised areas of the first semiconductor wafer in an environment having a first pressure;
• and
• separating the sacrificial semiconductor wafer from the second semiconductor wafer such that the second semiconductor wafer remains bonded to the first semiconductor wafer;
• bonding the surface of the second semiconductor wafer to the first semiconductor wafer in an environment having a second pressure, the second pressure being greater than the first pressure to influence the second semiconductor wafer into contact with the recesses in the surface of the first semiconductor wafer;
• and
• heat-treating the second semiconductor wafer and the first semiconductor wafer to further bond the second semiconductor wafer to the first semiconductor wafer.

A method for forming a strained silicon structure, comprising:

• forming a number of recesses in a surface of a first silicon wafer such that the surface of the first wafer has a number of raised areas and a number of recessed areas;
• bonding a surface of a second silicon wafer having a crystalline structure to the raised areas of the first wafer in an environment having a first pressure;
• and
• bonding the surface of the second silicon wafer to the recessed areas of the first silicon wafer in an environment having a second pressure, the second pressure being greater than the first pressure to strain the second silicon wafer into the recesses in the surface of the first silicon wafer.

A method for forming a transistor, comprising:

• forming a semiconductor structure with a strained membrane bonded to a semiconductor substrate, comprising:
• forming a number of recesses in a surface of the semiconductor substrate such that the surface of the semiconductor substrate has a number of raised areas and a number of recessed areas;
• bonding a surface of a second semiconductor wafer to the raised areas of the first semiconductor wafer in an environment having a first pressure;
• and
• bonding the surface of the second semiconductor wafer to the recessed areas of the first semiconductor wafer in an environment having a second pressure, the second pressure being greater than the first pressure to strain the second semiconductor wafer into the recesses in the surface of the first semiconductor wafer;
• forming a gate dielectric opposed to the strained membrane;
• and
• forming a gate opposed to the gate dielectric;
• and
• forming a first diffusion region and a second diffusion region, the first and second diffusion regions being separated by a channel region in the strained membrane, the channel region being positioned between the gate and the semiconductor substrate.

A method for forming a memory device, comprising:

• forming a memory array in a semiconductor substrate, including forming a plurality of memory cells in rows and columns and forming at least one transistor for each of the plurality of memory cells;
• forming a plurality of word lines, including connecting each word line to a row of memory cells;
• forming a plurality of bit lines, including connecting each bit line to a column of memory cells;
• forming control circuitry in the semiconductor substrate, including forming word line select circuitry and bit line select circuitry for use to select a number of memory cells for writing and reading operations,
• wherein at least one of forming the memory array and forming the control circuitry includes forming at least one transistor, including:
• forming a semiconductor structure with a strained crystalline semiconductor membrane bonded to a semiconductor substrate, comprising:
• forming a number of recesses in a surface of the semiconductor substrate such that the surface of the semiconductor substrate has a number of raised areas and a number of recessed areas;
• bonding a surface of a second semiconductor wafer to the raised areas of the first semiconductor wafer in an environment having a first pressure;
• and
• bonding the surface of the second semiconductor wafer to the recessed areas of the first semiconductor wafer in an environment having a second pressure, the second pressure being greater than the first pressure to strain the second semiconductor wafer into the recesses in the surface of the first semiconductor wafer;
• forming a first diffusion region and a second diffusion region separated by a channel region in the strained membrane;
• forming a gate dielectric over the channel region;
• and
• forming a gate over the gate dielectric.