US 7,115,476 B1 · Semiconductor manufacturing method and semiconductor device

Abstract

A method of manufacturing a semiconductor device includes forming a mask layer on a semiconductor substrate, etching the semiconductor substrate using the mask layer as a mask, thereby forming a semiconductor pillar, doping an impurity into the semiconductor substrate, thereby forming a first source/drain region in part of the semiconductor substrate, which is located under the semiconductor pillar, forming a gate insulating film on the semiconductor substrate, which contacts a side surface of the semiconductor pillar, forming a gate electrode on a side surface of the gate insulating film, forming a first insulating layer on the gate electrode, which contacts a side surface of the semiconductor pillar, and doping the impurity into the first insulating layer, thereby forming a second source/drain region in part of the semiconductor pillar, which is located on a side surface of the first insulating layer.

Claims20

Dependent claims

A method of manufacturing a semiconductor device, comprising:

forming a mask layer on a semiconductor substrate;
etching the semiconductor substrate using the mask layer as a mask, thereby forming a semiconductor pillar;
doping an impurity into the semiconductor substrate, thereby forming a first source/drain region in part of the semiconductor substrate, which is located under the semiconductor pillar;
forming a gate insulating film on the semiconductor substrate, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
forming a gate electrode on a side surface of the gate insulating film;
forming a first insulating layer on the gate electrode, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
and
doping the impurity into the first insulating layer, thereby forming a second source/drain region in part of the semiconductor pillar, which is located on a side surface of the first insulating layer.

5 more elements

A method of manufacturing a semiconductor device, comprising:

forming a mask layer on a semiconductor substrate;
etching the semiconductor substrate using the mask layer as a mask, thereby forming a semiconductor pillar;
and
forming each of a plurality of MOS transistors in the semiconductor pillar and on a side surface of the semiconductor pillar, such that the MOS transistors are stacked together,
wherein the forming said each of the plurality of MOS transistors including:
forming a first insulating layer which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
doping an impurity into the first insulating layer, thereby forming a first source/drain region in part of the semiconductor pillar, which is located on a side surface of the first insulating layer;
forming a gate insulating film on the first insulating layer, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
forming a gate electrode on a side surface of the gate insulating film;
forming a second insulating layer on the gate electrode, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
and
doping the impurity into the second insulating layer, thereby forming a second source/drain region in part of the semiconductor pillar, which is located on a side surface of the second insulating layer.

9 more elements

A method of manufacturing a semiconductor device, comprising:

forming a mask layer on a semiconductor substrate;
etching the semiconductor substrate using the mask layer as a mask, thereby forming a semiconductor pillar;
and
forming each of a plurality of memory cells in the semiconductor pillar and on a side surface of the semiconductor pillar, such that the memory cells are stacked together;
wherein the forming said each of the plurality of memory cells includes:
forming a first insulating layer which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
doping an impurity into the first insulating layer, thereby forming a first source/drain region in part of the semiconductor pillar, which is located on a side surface of the first insulating layer;
forming a gate insulating film on the first insulating layer, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
forming a charge-storage layer on a side surface of the gate insulating film;
forming a gate-to-gate insulating film on a side surface of the charge-storage layer;
forming a control gate electrode on a side surface of the gate-to-gate insulating film;
forming a second insulating layer on the charge-storage layer, the gate-to-gate insulating film and the control gate electrode, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
and
doping the impurity into the second insulating layer, thereby forming a second source/drain region in part of the semiconductor pillar, which is located on a side surface of the second insulating layer.

11 more elements

A method of manufacturing a semiconductor device, comprising:

forming a mask layer on a semiconductor substrate;
etching the semiconductor substrate using the mask layer as a mask, thereby forming a semiconductor pillar;
and
forming a memory cell in the semiconductor pillar and on a side surface of the semiconductor pillar, the memory cell including a selection transistor and a memory cell transistor,
wherein the forming the memory cell includes:
forming a first insulating layer which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
doping an impurity into the first insulating layer, thereby forming a first source/drain region in part of the semiconductor pillar, which is located on a side surface of the first insulating layer;
forming a first gate insulating film on the first insulating layer, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
forming a gate electrode on a side surface of the first gate insulating film;
forming a second insulating layer on the gate electrode, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
doping the impurity into the second insulating layer, thereby forming a second source/drain region in part of the semiconductor pillar, which is located on a side surface of the second insulating layer;
forming a second gate insulating film on the second insulating layer, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
forming a charge-storage layer on a side surface of the second gate insulating film;
forming a gate-to-gate insulating film on a side surface of the charge-storage layer;
forming a control gate electrode on a side surface of the gate-to-gate insulating film;
forming a third insulating layer on the charge-storage layer, the gate-to-gate insulating film and the gate electrode, which contacts a side surface of the semiconductor pillar, and surrounds the semiconductor pillar;
and
doping the impurity into the third insulating layer, thereby forming a third source/drain region in part of the semiconductor pillar, which is located on a side surface of the third insulating layer.

15 more elements

Dependencies are inferred from the claim text.

Semiconductor manufacturing method and semiconductor device

Life of this patent

Semiconductor manufacturing method and semiconductor device

Life of this patent

Abstract

Claims20