Solders with surfactant-refined grain sizes, solder bumps made thereof, and methods of making same
AssigneeIntel Corporation
InventorFay Hua
Life of this patent
Estimating the term…
Abstract
A doped tin-indium solder composition is disclosed. The doped tin-indium solder exhibits a retained fine-grain structure and superplasticity after significant thermal cycling and thermal and mechanical stresses experienced in a microelectronic package. A process of forming the doped tin-indium solder is also disclosed. A microelectronic package is also disclosed that uses the doped tin-indium solder composition. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes the doped tin-indium solder.
Claims31
A solder composition comprising:
- a tin base;
- from about 5 percent to about 15 percent indium;
- and
- from about 0.01 percent to about 3 percent of a dopant, wherein the dopant is selected from copper, zinc, nickel, germanium, antimony, silver, cadmium, tellurium, bismuth, platinum, lead, and a combination of at least two thereof, and wherein the solder composition has an average grain size from about 3 micron to about 15 micron.
A process comprising:
- forming a solder precursor on a die, wherein the solder precursor includes:
- a Sn-(5-15)In solder including a dopant, from about 0.01 percent to less than about 3 percent, wherein the dopant is selected from copper, zinc, nickel, germanium, antimony, silver, cadmium, tellurium, bismuth, platinum, lead, and a combination of at least two thereof;
- and
- a flux vehicle;
- and
- reflowing the solder precursor under conditions to volatilize the flux vehicle, and to retain a grain size of the SN-(5-15)In solder in a range from about 2 micron to about 15 micron.
A method of assembling a microelectronic device package, comprising:
- forming a solder precursor upon a die active surface, wherein the solder precursor includes a doped tin-indium metallization including a tin base, from about 5 percent to about 15 percent indium, and from about 0.01 percent to about 3 percent of a dopant, wherein the dopant is selected from copper, zinc, nickel, germanium, antimony, silver, cadmium, tellurium, bismuth, platinum, lead, and a combination thereof;
- and
- coupling the die to a mounting substrate, and wherein the solder composition has an average grain size from about 3 micron to about 15 micron.
A packaging system comprising:
- a die including an active surface and a backside surface;
- a solder bump in contact with the active surface, wherein the solder bump includes:
- a tin base;
- from about 5 percent to about 15 percent indium;
- and
- from about 0.01 percent to about 3 percent of a dopant, wherein the dopant is selected from copper, zinc, nickel, germanium, antimony, silver, cadmium, tellurium, bismuth, platinum, lead, and a combination thereof;
- and
- a mounting substrate coupled to the die through the solder bump, and wherein the solder composition has an average grain size from about 3 micron to about 15 micron.
A system comprising:
- a microelectronic die disposed upon a mounting substrate;
- a solder bump that couples the microelectronic die to the mounting substrate, the solder bump including:
- a tin base;
- from about 5 percent to about 15 percent indium;
- and
- from about 0.01 percent to about 3 percent of a dopant, wherein the dopant is selected from copper, zinc, nickel, germanium, antimony, silver, cadmium, tellurium, bismuth, platinum, lead, and a combination thereof;
- at least one of an input device and an output device coupled to the solder bump;
- and
- data storage coupled to the microelectronic die.
A system comprising:
- a first electrical conductor;
- a solder bump that is in contact with the first electrical conductor, the solder bump including:
- a tin base;
- from about 5 percent to about 15 percent indium;
- and
- from about 0.01 percent to about 3 percent of a dopant, wherein the dopant is selected from copper, zinc, nickel, germanium, antimony, silver, cadmium, tellurium, bismuth, platinum, lead, and a combination thereof, and wherein the solder composition has an average grain size from about 3 micron to about 15 micron;
- and
- a second electrical conductor that is in contact with the solder bump.
Dependencies are inferred from the claim text.