US 7,110,289 B1Granted

Method and system for controlling MRAM write current to reduce power consumption

AssigneesWestern Digital (Fremont), LLC, STMicroelectronics S.r.l.

InventorsKyusik Sin, Hugh Craig Hiner, Xizeng (Stone) Shi, William D. Jensen, Hua-Ching Tong, Matthew R Gibbons, Roberto Bez, Giulio Casagrande, Paolo Cappeletti, Marco Pasotti

Life of this patent

Estimating the term…

patentgrep

Loading patent…

Abstract

In a method and system for reducing power consumed by a magnetic memory, magnetic memory cells are coupled to a bit line and are associated with a plurality of digit lines. A bit line current is provided in the bit line. Digit currents are provided in parallel in the digit lines at substantially the same time as the bit line current. The digit and bit line currents allow the magnetic memory cells to be written to a plurality of states in parallel.

Claims8

Dependent claims

A method for programming a plurality of magnetic memory cells, the plurality of magnetic memory cells being coupled to a bit line, the plurality of magnetic memory cells being associated with a plurality of digit lines, the method comprising the steps of:

(a) providing a predetermined bit line current IB in the bit line at a predetermined bit line voltage VB;
and
(b) providing a plurality of predetermined digit currents ID in parallel in the plurality of digit lines at a predetermined digit line voltage VD for the plurality of magnetic memory cells at substantially the same time as the bit line current IB, the plurality of digit currents and the bit line current allowing the plurality of magnetic memory cells to be written to a plurality of states in parallel, wherein the total power supplied to the plurality of magnetic memory cells during writing is IBVB+NIDVD, where N is the number of digit lines.

Dependencies are inferred from the claim text.