Single-chip USB controller reading power-on boot code from integrated flash memory for user storage

A ROM-less single-chip flash device comprising:

• a serial interface to a serial-data bus that connects to a host;
• a serial engine for detecting and processing packets sent over the serial-data bus;
• a serial-engine buffer for storing data sent over the serial-data bus;
• an internal bus coupled to the serial-engine buffer;
• a random-access memory (RAM) for storing instructions for execution, the RAM on the internal bus;
• a central processing unit, on the internal bus, the CPU accessing and executing instructions in the RAM;
• a flash-memory controller, on the internal bus, for generating flash-control signals and for buffering commands, addresses, and data to a flash bus;
• flash mass storage blocks coupled to the flash-memory controller by the flash bus, and controlled by the flash-control signals;
• a direct-memory access (DMA) engine, on the internal bus, for transferring data over the internal bus;
• and
• a flash programming engine, activated by a reset, for initially programming the DMA engine to transfer an initial program of instructions from the flash mass storage blocks to the RAM before the CPU begins execution of instructions after the reset;
• whereby the initial program of instructions is transferred from the flash mass storage blocks to the RAM before execution by the CPU begins, eliminating a need for a local read-only memory (ROM) for storing the initial program of instructions.

A flash drive comprising:

• a switch that connects to a host over a host bus, and connects to downstream devices over a plurality of serial buses;
• a plurality of serial single-chip flash devices, coupled to the switch as the downstream devices, each serial single-chip flash device comprising:
• a serial-flash microcontroller having a processor;
• a main memory coupled to the processor for storing instructions for execution by the processor;
• a serial interface the switch through one of the plurality of serial buses;
• a flash-memory controller;
• a plurality of flash mass storage blocks that are block-accessible by the CPU through the flash-memory controller;
• a direct-memory access (DMA) engine for directly transferring data and instructions over an internal bus among the serial interface, the main memory, the CPU, and the flash-memory controller;
• a flash programming engine for initially programming the DMA engine to read an initial program from first page of the plurality of flash mass storage blocks and write the initial program to the main memory for execution by the CPU.