US 7,102,433 B2Granted

Boosting circuit

AssigneeSamsung Electronics Co., Ltd.

InventorsJeong-won Lee, Jae-jun Moon, Soo-jung Chang

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Abstract

A boosting circuit is disclosed. The boosting circuit includes an input circuit part for outputting a differential current proportional to input voltages; a bias circuit part for mirroring the differential current, and producing an inverted differential current that the differential current is inverted; and an output circuit part for adjusting magnitudes of the differential current and the inverted differential current based on a predetermined ratio of MOS transistors, respectively, adding the adjusted differential current and inverted differential current, and producing an output current in a push-pull form. Accordingly, the boosting circuit has a broad maximum differentiable frequency bandwidth, and facilitates the adjustments of differentiation characteristics of an output current. Further, an amount of output current of differentiation form is not affected by external factors such as voltages, processes, temperatures, and so on.

Claims5

Dependent claims

A boosting circuit, comprising:

an input circuit part for outputting a differential current proportional to differentiations of input voltages;
a bias circuit part for mirroring the differential current, inverting the differential current, and producing an inverted differential current;
and
an output circuit part for adjusting each magnitude of the differential current and the inverted differential current based on a predetermined ratio size of MOS transistors of the output circuit part, to output an adjusted differential current and an adjusted inverted differential current, adding the adjusted differential current and the adjusted inverted differential current, and producing an output current in a push-pull form;
wherein the input circuit part includes:
a first differentiation circuit for being inputted with a reference voltage and a first input voltage of the input voltages, and outputting a first differential current;
a second differentiation circuit for being inputted with the reference voltage and a second input voltage of the input voltages, and outputting a second differential current;
and
a current mirror circuit for mirroring the first and second differential currents.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/751,469Filed 6 Jan 2004
Priority: KR 10-2003-000462623 Jan 2003
Published: US 2004/0145412 A129 Jul 2004
Granted: 5 Sep 2006
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

H03F 3/3062
Bridge type, i.e. two complementary controlled SEPP output stages: with asymmetrical driving of the end stage
H03F 3/3023
CMOS common source output SEPP amplifiers: with asymmetrical driving of the end stage
H03K 5/2481
Using field effect transistors: with at least one differential stage
G11B 20/10009
Digital recording or reproducing: improvement or modification of read or write signals