Clock-generator architecture for a programmable-logic-based system on a chip

A programmable system-on-a-chip integrated circuit device comprising:

• a programmable logic block;
• a non-volatile memory;
• a crystal oscillator circuit;
• an RC oscillator circuit;
• an external oscillator input;
• a clock conditioning circuit coupled to the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input through a multiplexer controlled by the programmable logic block;
• a real-time clock selectively coupleable to one of the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input through a multiplexer controlled by the programmable logic block.

A method of temporarily turning off a power supply to a selected circuit of a programmable system-on-a-chip integrated circuit device comprising:

• inputting a set time value to a real time clock on:
• the integrated circuit device;
• turning off the power supply to a programmable logic block on the integrated circuit device in response to a signal received by a voltage regulator circuit on the integrated circuit device indicating that the power supply to the programmable logic block is to be turned off;
• counting an elapsed time with the real time clock;
• sending a match signal from the real-time clock to the voltage regulator circuit when the elapsed time matches the set time value;
• and
• turning on the power to the programmable logic block in response to the match signal received by the voltage regulator circuit.

A method of temporarily turning off a power supply to a selected circuit of a programmable system-on-a-chip integrated circuit device comprising:

• inputting a set time value to a real time clock on the integrated circuit device;
• turning off the power supply to a programmable logic block on the integrated circuit device in response to a signal received by a voltage regulator circuit on the integrated circuit device indicating that the power supply to the programmable logic block is to be turned off;
• counting an elapsed time with the real time clock;
• turning on the power to the programmable logic block if an external wake-up signal is received by the voltage regulator circuit;
• and
• if the external wake-up signal is not received by the voltage regulator circuit before the elapsed time matches the set time value, sending a match signal from the real-time clock to the voltage regulator circuit and turning on the power to the programmable logic block in response to the match signal received by the voltage regulator circuit.

A method of providing a clock signal for operation of circuits on a system-on-a-chip integrated circuit device containing a programmable logic block, the method comprising:

• selecting a clock signal to input to a clock conditioning circuit including a phase locked loop on the integrated circuit device;
• programmably configuring at least one divider circuit in the clock conditioning circuitry;
• routing the clock signal through the clock conditioning circuitry using a multiplexer driven from the programmable logic block;
• and
• routing the clock signal to at least one of a programmable logic block on the integrated circuit device, a real time clock on the integrated circuit device and an output pad of the integrated circuit device.

A method of providing clock signals for internal operation of a system-on-a-chip integrated circuit device and operation of a circuit external to the system-on-a-chip device comprising:

• selecting a first clock signal to operate circuits internal to the integrated circuit device;
• selecting a second clock signal to output to circuits external to the integrated circuit device;
• programmably configuring at least one divider circuit in a clock conditioning circuit on the integrated circuit device;
• routing at least one of the first clock signal and the second clock signal to the clock conditioning circuit;
• and
• routing the second clock signal to an output pad of the system-on-a-chip device.