Method for generating a command file of a group of DRC rules and/or a command file of a group of LVS/LPE rules

A method for generating a command file of a group of layout versus schematic (LVS) rules and layout parasitic extraction (LPE) rules to be used by a layout verification tool to verify a layout and the parasitic characteristics of an integrated circuit, the method comprising:

• (a) selecting a process from a group of processes;
• (b) setting a set of parameters;
• (c) extracting program codes from a plurality of modules according to the selected process and the set of parameters;
• and
• (d) combining the program codes extracted from the plurality of modules to form a corresponding command file of the group of LVS/LPE rules to be run by the layout verification tool to verify the layout and parasitic characteristics of the integrated circuit.

A method for generating a command file of a group of design rule check (DRC) rules or layout versus schematic (LVS) rules and layout parasitic extraction (LPE) rules to be used by a layout verification tool to verify a layout and parasitic characteristics of an integrated circuit, the method comprising:

• (a) choosing whether to generate a command file of DRC rules or a command file of LVS/LPE rules;
• (b) selecting a process from a group of processes;
• (c) setting a set of parameters;
• (d) extracting program codes from a plurality of modules according to the choice in step (a), the selected process, and the set of parameters;
• and
• (e) combining program codes extracted from a plurality of modules to form the command file of the group of DRC rules or the command file of the group of LVS/LPE rules to be run by the layout verification tool.