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AssigneeCiena Corporation
InventorsHoward H. Ireland, Jeffery T. Nichols
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A method and apparatus for performing quickly and efficiently generating the error correction polynomial. In accordance with the present invention, multiple coefficients of the syndrome vector are processed in parallel by a Berlekamp algorithm logic block of the present invention. The Berlekamp algorithm's iterations can be performed in less than 60 clock cycles for a large order error correction polynomial, thereby enabling the polynomial to be generated very rapidly. In order to perform the Berlekamp algorithm at such a high rate of speed, Galois field multiplier logic is utilized in performing the algorithm. Furthermore, because of the large number of logical multiplication and addition operations that are performed in parallel, the Galois filed multiplier logic in accordance with the preferred embodiment of the present invention is configured in such a way that redundancy in processing polynomial coefficients is greatly reduced, which enables the number of logic gates needed to implement the Galois field multiplier logic to be vastly reduced. This reduction in the number of gates used for this purpose reduces area and power consumption requirements.
An apparatus for computing an error location polynomial in a decoder of a forward error correction (FEC) system, the apparatus comprising Berlekamp-type algorithm logic configured to receive a resolved syndrome vector having a plurality of coefficients and to iteratively process the coefficients in accordance with a Berlekamp-type algorithm by simultaneously binary multiplying a plurality of respective coefficients of the syndrome vector by a plurality of respective coefficients of the error location polynomial to generate intermediate values for the coefficients of the error location polynomial, and wherein after a number of the processing iterations have been performed, the coefficients of the error location polynomial resolve from intermediate values to final values, and wherein multiple iterations are performed in a single system clock cycle.
A method for computing an error location polynomial in a decoder of a forward error correction (FEC) system, the method using a Berlekamp-type algorithm to compute the error location polynomial, the method comprising the steps of:
A computer program for computing an error location polynomial in a decoder of a forward error correction (FEC) system, the program being embodied on a computer-readable medium, the program comprising:
Dependencies are inferred from the claim text.