Iterative concatenated code decoding circuit and encoding/decoding system using the same

An iterative concatenated code decoding circuit, employing a concatenated code concatenating an outer code and an inner code, in which a coding ratio of each of said inner code and said outer code is respectively represented by (code-word length—redundancy check length)/(code-word length), said inner code having a higher coding ratio than said outer code, said decoding circuit comprising:

• an inner decoder for decoding said inner code having a high coding ratio;
• and
• an outer decoder for decoding said outer code having a low coding ratio,
• wherein said inner decoder and said outer decoder are disposed at multiple stages,
• said outer decoder employs a read-only memory to detect an error location,
• said outer decoder employs the read-only memory to acQuire an inner code modification syndrome coefficient indicating a variation between a syndrome coefficient for the output data of said inner decoder at the former stage and a syndrome coefficient for the input data of said inner decoder at the latter stage when the errors are corrected, and
• the inner decoders at the second and ensuing stages make the decoding on the basis of the result of adding the syndrome coefficient of the inner decoder at the former stage and said inner code modification syndrome coefficient calculated by the outer decoder at the former stage.

An iterative concatenated code decoding circuit, comprising:

• an inner decoder for decoding the encoded data received through a transmission path and correcting the errors of said data;
• a deinterleaver for deinterleaving the data decoded by said inner decoder;
• an outer decoder for decoding the deinterleaved data and correcting the errors of said data;
• and
• an interleaver for interleaving the data decoded by said outer decoder,
• wherein said inner decoder, said deinterleaver, said outer decoder and said interleaver are disposed at N (N is a positive integer) stages, said iterative concatenated code decoding circuit employs a concatenated code concatenating an outer code and an inner code, in which a coding ratio of each of said inner code and said outer code is respectively represented by (code-word length—redundancy check length)/(code-word length), said inner decoder decodes said inner code with a high coding ratio and said outer decoder decodes said outer code with a low coding ratio stages, and said outer decoder comprises a circuit configuration different than a circuit configuration of said inner decoder to locate and correct errors;
• said outer decoder employs a read-only memory to accjuire an inner code modification syndrome coefficient indicating a variation between a syndrome coefficient for output data of said inner decoder at a former stage and a syndrome coefficient for input data of said inner decoder at a latter stage when an error is corrected, and the inner decoders at a second and ensuing stages make the decoding on a basis of a result of adding the syndrome coefficient of the inner decoder at the former stage and said inner code modification syndrome coefficient calculated by the outer decoder at the former stage.

An encoding/decoding system, comprising:

• an encoding device for encoding a concatenated code concatenating an outer code and an inner code;
• and
• a decoding device including an iterative concatenated code decoding circuit for decoding said concatenated code, in which a coding ratio of each of said inner code and said outer code is respectively represented by (code-word length—redundancy check length)/(code-word length),
• wherein said encoding device comprises an inner encoder for encoding said inner code with a high coding ratio, and an outer encoder for encoding said outer code with a low coding ratio,
• said iterative concatenated code decoding circuit comprises an inner decoder for decoding said inner code with the high coding ratio and an outer decoder for decoding said Outer code with the low coding ratio,
• said inner decoder and said outer decoder are disposed at multiple stages,
• said outer decoder comprises a circuit configuration different than a circuit configuration of said inner decoder to locate and correct errors,
• said concatenated code comprises a BCH (Bose-Chaudhuri-Hocciuenghem) code containing a Reed-Solomon code,
• said outer decoder employs a read-only memory to acQuire an inner code modification syndrome coefficient indicating a variation between a syndrome coefficient for output data of said inner decoder at a former stage and a syndrome coefficient for input data of said inner decoder at a latter stage when errors are corrected, and
• the inner decoders at a second and ensuing stages make the decoding on a basis of a result of adding the syndrome coefficient of the inner decoder at the former stage and said inner code modification syndrome coefficient calculated by the outer decoder at the former stage.

An encoding/decoding system, comprising:

• an encoding device for encoding a concatenated code concatenating an outer code and an inner code;
• and
• a decoding device including an iterative concatenated code decoding circuit for decoding said concatenated code, in which a coding ratio of each of said inner code and said outer code is respectively represented by (code-word length—redundancy check length)/(code-word length),
• wherein said encoding device comprises an inner encoder for encoding said inner code with a high coding ratio, and an outer encoder for encoding said outer code with a low coding ratio,
• said iterative concatenated code decoding circuit comprises an inner decoder for decoding said inner code with the high coding ratio and an outer decoder for decoding said outer code with the low coding ratio, said inner decoder and said outer decoder are disposed at multiple stages,
• wherein said outer decoder employs a read-only memory to detect an error location,
• said outer decoder employs the read-only memory to acciuire an inner code modification syndrome coefficient indicating a variation between a syndrome coefficient for output data of said inner decoder at a former stage and a syndrome coefficient for input data of said inner decoder at a latter stage when errors are corrected, and the inner decoders at a second and ensuing stages make the decoding on a basis of a result of adding the syndrome coefficient of the inner decoder at the former stage and said inner code modification syndrome coefficient calculated by the outer decoder at the former stage.

An encoding/decoding system, comprising:

• an encoding device for encoding a concatenated code concatenating an outer code and an inner code;
• an inner decoder for decoding the encoded data received through a transmission path from said encoding device and correcting the errors of said data;
• a deinterleaver for deinterleaving the decoded data;
• an outer decoder for decoding the deinterleaved data and correcting the errors of said data;
• and
• an interleaver for interleaving the data decoded by said outer decoder,
• wherein said inner decoder, said deinterleaver, said outer decoder and said interleaver are disposed at N (N is a positive integer) stages,
• said iterative concatenated code decoding circuit employs the concatenated code concatenating an outer code and an inner code, in which a coding ratio of each of said inner code and said outer code is respectively represented by (code-word length—redundancy check length)/(code-word length),
• said encoding device has an inner encoder for encoding said inner code with a high coding ratio, and an outer encoder for encoding said outer code with a low coding ratio, and said inner decoder decodes said inner code with the high coding ratio and said outer decoder decodes said outer code with the low coding ratio, and said outer decoder comprises a circuit configuration different than a circuit configuration of said inner decoder to locate and correct errors
• said outer decoder employs a read-only memory to acciuire an inner code modification syndrome coefficient indicating a variation between a syndrome coefficient for output data of said inner decoder at a former stage and a syndrome coefficient for input data of said inner decoder at a latter stage when errors are corrected, and the inner decoders at a second and ensuing stages make the decoding on a basis of a result of adding the syndrome coefficient of the inner decoder at the former stage and said inner code modification syndrome coefficient calculated by the outer decoder at the former stage.