Method and apparatus for setting timing parameters

An apparatus comprising:

• a processor;
• a logic component;
• a processor bus coupling the processor to the logic component;
• and
• a controller coupled to the processor by way of a first control bus to read a timing value representing a maximum internal clock speed of the processor from the processor and to derive and set an internal clock speed of the processor based on the timing value.

A computer-readable medium containing a sequence of instructions, which when executed by a processor causes the processor to:

• read a first timing value relating to the timing of a bus by way of a first control bus from a first electronic device that is coupled to the bus;
• derive a timing parameter for the bus using the first timing value;
• cause the first electronic device to refrain from carrying out transactions on the bus;
• and
• set a clock speed for the bus by writing the timing parameter by way of a second control bus to a second electronic device that is coupled to the bus.

An apparatus comprising:

• a processor;
• a logic component coupled to the processor by way of a first control bus to read a timing value representing a maximum internal clock speed of the processor from the processor and to set an internal clock speed of the processor based upon the timing value;
• and
• a processor bus coupling the processor to the logic component.